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FAN4803CP-2 Folha de dados(PDF) 7 Page - Fairchild Semiconductor |
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FAN4803CP-2 Folha de dados(HTML) 7 Page - Fairchild Semiconductor |
7 / 12 page PRODUCT SPECIFICATION FAN4803 REV. 1.2.3 11/2/04 7 Internal Voltage Ramp The internal ramp current source is programmed by way of the VEAO pin voltage. Figure 7 displays the internal ramp current vs. the VEAO voltage. This current source is used to develop the internal ramp by charging the internal 30pF +12/ –10% capacitor. See Figures 10 and 11. The frequency of the internal programming ramp is set internally to 67kHz. PFC Current Sense Filtering In DCM, the input current wave shaping technique used by the FAN4803 could cause the input current to run away. In order for this technique to be able to operate properly under DCM, the programming ramp must meet the boost inductor current down-slope at zero amps. Assuming the programming ramp is zero under light load, the OFF-time will be terminated once the inductor current reaches zero. R f × C COMP COMP 1 (3) (4) 2 × π × R Hz × nF k Ω COMP 1 62 8 × 30 16 330 . C f R ZERO COMP 1 2 × π ×× 10 C Hz × k Ω µF ZERO 1 628 × 3 330 016 . . = == = = = Figure 4. Voltage Control Loop FAN4803 FAN4803 IVEAO 34 µA IOUT VO 220 µF RLOAD 667 Ω 330k Ω 11.3M Ω 0.15 µF 15nF POWER STAGE COMPENSATION VEAO ∆VEAO + – Figure 5. Voltage Loop Gain 60 40 20 0 –20 –40 –60 FREQUENCY (Hz) 0.1 10 1000 1 100 Power Stage Overall Gain Compensation Network Gain Figure 6. Voltage Loop Phase 0 50 100 150 200 FREQUENCY (Hz) 0.1 1 10 1000 100 Power Stage Overall Compensation Network Figure 7. Internal Ramp Current vs. VEAO 50 40 30 20 10 0 VEAO (V) 02 7 5 13 6 4 FF @ –55ºC TYP @ –55ºC TYP @ 155ºC SS @ 155ºC TYP @ ROOM TEMP |
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