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HCPL-643X Folha de dados(PDF) 7 Page - AVAGO TECHNOLOGIES LIMITED

Nome de Peças HCPL-643X
Descrição Electrónicos  Hermetically Sealed, Very High Speed, Logic Gate Optocouplers High radiation immunity
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Fabricante Electrônico  AVAGO [AVAGO TECHNOLOGIES LIMITED]
Página de início  http://www.avagotech.com
Logo AVAGO - AVAGO TECHNOLOGIES LIMITED

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Notes:
1. Not to exceed 5% duty factor, not to exceed 50
sec pulse width.
2. All devices are considered two-terminal devices: measured between
all input leads or terminals shorted together and all output leads or
terminals shorted together.
3. This is a momentary withstand test, not an operating condition.
4. tPHL propagation delay is measured from the 50% point on the rising
edge of the input current pulse to the 1.5 V point on the falling edge
of the output pulse. The tPLH propagation delay is measured from the
50% point on the falling edge of the input current pulse to the 1.5 V
point on the rising edge of the output pulse. Pulse Width Distortion,
PWD = |tPHL - tPLH|.
5. CML is the maximum slew rate of the common mode voltage that can
be sustained with the output voltage in the logic low state (VO(MAX)
< 0.8 V). CMH is the maximum slew rate of the common mode voltage
that can be sustained with the output voltage in the logic high state
(VO(MIN) > 2.0 V).
6. Duration of output short circuit time not to exceed 10 ms.
7. Power Supply Noise Immunity is the peak to peak amplitude of the
ac ripple voltage on the VCC line that the device will withstand and
still remain in the desired logic state. For desired logic high state,
VOH(MIN) > 2.0 V, and for desired logic low state, VOL(MAX) < 0.8 V.
8. Measured between adjacent input pairs shorted together for each
multichannel device.
9. Each channel.
10. Standard parts receive 100% testing at 25° C (Subgroups 1 and 9).
SMD, Class H and Class K parts receive 100% testing at 25° C, 125° C,
and -55° C (Subgroups 1 and 9, 2 and 10, 3 and 11, respectively).
11. Parameters are tested as part of device initial characterization and
after design and process changes. Parameters are guaranteed to
limits specified for all lots not specifically tested.
12. Propagation delay skew is defined as the difference between the
minimum and maximum propagation delays for any given group of
optocouplers with the same part number that are all switching at the
same time under the same operating conditions.
13. The HCPL-6430, HCPL-6431, and HCPL-643K dual channel parts
function as two independent single channel units. Use the single
channel parameter limits.
Typical Characteristics
All typical values are at TA = 25°C, VCC = 5 V, IF = 8 mA, unless otherwise specified.
Parameter
Symbol
Typ.
Units
Test Conditions
Fig.
Notes
Input Current Hysteresis
IHYS
0.25
mA
VCC = 5 V
3
Input Diode Temperature Coefficient
VF
TA
-1.11
mV/°C
IF = 10 mA
4
Resistance (Input-Output)
RI-O
1012
VI-O = 500 V
2
Capacitance (Input-Output)
CI-O
0.6
pF
f = 1 MHz, VI-O = 0 V
2
Logic Low Short Circuit Output Current
IOSL
65
mA
VO = VCC = 5.25 V, IF = 10 mA
6, 9
Logic High Short Circuit Output Current
IOSH
-50
mA
VCC = 5.25 V, IF = 0 mA,
VO = GND
6, 9
Output Rise Time (10-90%)
tr
15
ns
5
Output Fall Time (90-10%)
tf
10
ns
5
Propagation Delay Skew
tPSK
30
ns
10
12
Power Supply Noise Immunity
PSNI
0.5
VP-P
48 Hz ≤ fac ≤ 50 MHz
7
Single Channel Product Only
Parameter
Symbol
Typ.
Units
Test Conditions
Fig.
Notes
Input Capacitance
CIN
15
pF
f = 1 MHz, VF = 0 V,
Pins 2 and 3
Output Enable Time to Logic High
tPZH
15
ns
8, 9
Output Enable Time to Logic Low
tPZL
30
ns
8, 9
Output Disable Time from Logic High
tPHZ
20
ns
8, 9
Output Disable Time from Logic Low
tPLZ
15
ns
8, 9
Dual and Quad Channel Product Only
Input Capacitance
CIN
15
pF
f = 1 MHz, VO = 0 V
Input-Input Leakage Current
II-I
0.5
nA
RH ≤ 65%, VI-I = 500 Vdc
8
Input-Input Resistance
RI-I
1012
VI-I = 500 V
8
Input-Input Capacitance
CI-I
1.3
pF
f = 1 MHz, VF = 0 V
8


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