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FAN5093MTC Folha de dados(PDF) 10 Page - Fairchild Semiconductor |
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FAN5093MTC Folha de dados(HTML) 10 Page - Fairchild Semiconductor |
10 / 17 page FAN5093 PRODUCT SPECIFICATION 10 REV. 1.1.0 3/27/03 Application Information Operation The FAN5093 Controller The FAN5093 is a programmable synchronous two-phase DC-DC controller IC. When designed with the appropriate external components, the FAN5093 can be configured to deliver more than 50A of output current, for VRM 9.x applications. The FAN5093 functions as a fixed frequency PWM step down regulator, with a high efficiency mode (E*) at light load. Main Control Loop Refer to the FAN5093 Block Diagram on page 1. The FAN5093 consists of two interleaved synchronous buck con- verters, implemented with summing-mode control. Each phase has its own current feedback, and there is a common voltage feedback. The two buck converters controlled by the FAN5093 are interleaved, that is, they run 180 ° out of phase. This mini- mizes the RMS input ripple current, minimizing the number of input capacitors required. It also doubles the effective switching frequency, improving transient response. The FAN5093 implements “summing mode control”, which is different from both classical voltage-mode and current- mode control. It provides superior performance to either by allowing a large converter bandwidth over a wide range of output loads and external components. No external compen- sation is required. The control loop of the regulator contains two main sections: the analog control block and the digital control block. The analog section consists of signal conditioning amplifiers feeding into a comparator which provides the input to the digital control block. The signal conditioning section accepts inputs from a current sensor and a voltage sensor, with the voltage sensor being common to both phases, and the current sensor separate for each. The voltage sensor amplifies the difference between the VFB signal and the reference voltage from the DAC and presents the output to each of the two comparators. The current control path for each phase takes the difference between its PGND and SW pins when the low- side MOSFET is on, reproducing the voltage across the MOSFET and thus the input current; it presents the resulting signal to the same input of its summing amplifier, adding its signal to the voltage amplifier’s with a certain gain. These two signals are thus summed together. This sum is then pre- sented to a comparator looking at the oscillator ramp, which provides the main PWM control signal to the digital control block. The oscillator ramps are 180 ° out of phase with each other, so that the two phases are on alternately. The digital control block takes the analog comparator input to provide the appropriate pulses to the HDRV and LDRV output pins for each phase. These outputs control the external power MOSFETs. Response Time The FAN5093 utilizes leading-edge, not trailing-edge control. Conventional trailing-edge control turns on the high-side MOSFET at a clock signal, and then turns it off when the error amplifier output voltage is equal to the ramp voltage. As a result, the response time of a trailing-edge converter can be as long as the off-time of the high-side driver, nearly an entire switching period. The FAN5093’s leading-edge control turns the high-side MOSFET on when the error amplifier output voltage is equal to the ramp volt- age, and turns it off at the clock signal. As a result, when a transient occurs, the FAN5093 responds immediately by turning on the high-side MOSFET. Response time is set by the internal propagation delays, typically 100nsec. In worst case, the response time is set by the minimum on-time of the low-side MOSFET, 330nsec. Oscillator The FAN5093 oscillator section runs at a frequency deter- mined by a resistor from the RT pin to ground according to the formula The oscillator generates two internal sawtooth ramps, each at one-half the oscillator frequency, and running 180 ° out of phase with each other. These ramps cause the turn-on time of the two phases to be phased apart. The oscillator frequency of the FAN5093 can be programmed from 200KHz to 2MHz with each phase running at 100KHz to 1MHz, respectively. Selection of a frequency will depend on various system performance criteria, with higher frequency resulting in smaller components but typically lower efficiency. Remote Voltage Sense The FAN5093 has true remote voltage sense capability, elim- inating errors due to trace resistance. To utilize remote sense, the VFB and AGND pins should be connected as a Kelvin trace pair to the point of regulation, such as the processor pins. The converter will maintain the voltage in regulation at that point. Care is required in layout of these grounds; see the layout guidelines in this datasheet. High Current Output Drivers The FAN5093 contains four high current output drivers that utilize MOSFETs in a push-pull configuration. The drivers for the high-side MOSFETs use the BOOT pin for input power and the SW pin for return. The drivers for the low-side MOSFETs use the VCC pin for input power and the PGND pin for return. Typically, the BOOT pin will use a charge pump as shown in Figure 2. Note that the BOOT and VCC pins are separated from the chip’s internal power and ground, BYPASS and AGND, for switching noise immunity. R T Ω () 27.5E9 fHz () ------------------- = |
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