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AD8016AREZ Folha de dados(PDF) 1 Page - Analog Devices |
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AD8016AREZ Folha de dados(HTML) 1 Page - Analog Devices |
1 / 21 page Low Power, High Output Current xDSL Line Driver Data Sheet AD8016 Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2012 Analog Devices, Inc. All rights reserved. FEATURES xDSL line driver that features full ADSL central office (CO) Performance on ±12 V supplies Low power operation ±5 V to ±12 V voltage supply 12.5 mA/amp (typical) total supply current Power reduced keep alive current of 4.5 mA/amp High output voltage and current drive IOUT = 600 mA 40 V p-p differential output voltage RL = 50 Ω, VS = ±12 V Low single-tone distortion –75 dBc @ 1 MHz SFDR, RL = 100 Ω, VOUT = 2 V p-p MTPR = –75 dBc, 26 kHz to 1.1 MHz, ZLINE = 100 Ω, PLINE = 20.4 dBm High Speed 78 MHz bandwidth (–3 dB), G = +5 40 MHz gain flatness 1000 V/μs slew rate PIN CONFIGURATIONS Figure 1. 24-Lead SOIC_W_BAT (RB-24) Figure 2. 28-Lead TSSOP_EP (RE-28-1) GENERAL DESCRIPTION The AD8016 high output current dual amplifier is designed for the line drive interface in Digital Subscriber Line systems such as ADSL, HDSL2, and proprietary xDSL systems. The drivers are capable, in full-bias operation, of providing 24.4 dBm output power into low resistance loads, enough to power a 20.4 dBm line, including hybrid insertion loss. The AD8016 is available in a low cost 24-lead SOIC_W_BAT and a 28-lead TSSOP_EP with an exposed lead frame (ePAD). Operating from ±12 V supplies, the AD8016 requires only 1.5 W of total power dissipation (refer to the Power Dissipation section for details) while driving 20.4 dBm of power downstream using the xDSL hybrid in Figure 35 and Figure 36. Two digital bits (PWDN0, PWDN1) allow the driver to be capable of full performance, an output keep-alive state, or two intermediate bias states. The keep-alive state biases the output transistors enough to provide a low impedance at the amplifier outputs for back termination. The low power dissipation, high output current, high output voltage swing, flexible power-down, and robust thermal packaging enable the AD8016 to be used as the central office (CO) terminal driver in ADSL, HDSL2, VDSL, and proprietary xDSL systems. +– +– +V1 +V2 1 2 3 4 24 23 22 21 5 6 7 8 9 16 10 15 11 14 12 13 NC = NO CONNECT AD8016 TOP VIEW (Not to Scale) 20 19 18 17 VOUT1 VINN1 VINP1 AGND AGND AGND AGND PWDN0 DGND –V1 NC VOUT2 VINN2 VINP2 AGND AGND AGND AGND PWDN1 BIAS –V2 NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 AD8016ARE BIAS –V2 PWDN1 NOTES 1. THE EXPOSED PADDLE IS FLOATING, NOT ELECTRICALLY CONNECTED INTERNALLY. 2. NC = NO CONNECT. DGND –V1 PWDN0 NC NC NC NC NC NC NC NC NC NC NC +VIN2 –VIN2 VOUT2 +V2 +V1 VOUT1 –VIN1 +VIN1 NC NC NC TOP VIEW (Not to Scale) |
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