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74AUP1G34-Q100 Folha de dados(PDF) 2 Page - NXP Semiconductors |
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74AUP1G34-Q100 Folha de dados(HTML) 2 Page - NXP Semiconductors |
2 / 14 page 74AUP1G34_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 1 — 26 March 2013 2 of 14 NXP Semiconductors 74AUP1G34-Q100 Low-power buffer 3. Ordering information 4. Marking [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 6. Pinning information 6.1 Pinning Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP1G34GW-Q100 40 C to +125 C TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1 Table 2. Marking Type number Marking code[1] 74AUP1G34GW-Q100 aN Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram 001aac538 2A 4 Y 001aac537 24 001aac536 Y A Fig 4. Pin configuration SOT353-1 $83*4 QF 9&& $ *1' < DDD |
Nº de peça semelhante - 74AUP1G34-Q100 |
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Descrição semelhante - 74AUP1G34-Q100 |
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