September 1983

Revised April 1999

© 1999 Fairchild Semiconductor Corporation

DS500059.prf

www.fairchildsemi.com

MM74HCT14

Hex Inverting Schmitt Trigger

General Description

The MM74HCT14 utilizes advanced silicon-gate CMOS

technology to achieve the low power dissipation and high

noise immunity of standard CMOS, as well as the capability

to drive 10 LS-TTL loads.

The 74HCT logic family is functionally and pinout compati-

ble with the standard 74LS logic family. All inputs are pro-

tected from damage due to static discharge by internal

Features

s Typical propagation delay: 13 ns

s Wide power supply range: 2–6V

s Low quiescent current: 10

µA maximum

s Low input current: 1

µA maximum

s Fanout of 10 LS-TTL loads

s TTL, LS pin-out and input threshold compatible

Ordering Codes:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Pin Assignments for DIP, SOIC, SOP and TSSOP

Top View

Schematic Diagram

Order Number

Package Number

Package Description

MM74HCT14M

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow

MM74HCT14SJ

M14D

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

MM74HCT14MTC

MTC14

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MM74HCT14N

N14A

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide