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AD7849ARZ-REEL Folha de dados(PDF) 5 Page - Analog Devices |
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AD7849ARZ-REEL Folha de dados(HTML) 5 Page - Analog Devices |
5 / 20 page AD7849 Rev. C | Page 5 of 20 AC PERFORMANCE CHARACTERISTICS These characteristics are included for design guidance and are no subject to test. VREF+ = 5 V; VDD = 14.25 V to 15.75 V; VSS = −14.25 V to −15.75 V; VCC = 4.75 V to 5.25 V; ROFS connected to 0 V. Table 3. Parameter A, B, C Versions Unit Test Conditions/Comments DYNAMIC PERFORMANCE Output Settling Time1 7 μs typ To 0.006% FSR. VOUT loaded. VREF− = 0 V. 10 μs typ To 0.003% FSR. VOUT loaded. VREF− = −5 V. Slew Rate 4 V/μs typ Digital-to-Analog Glitch Impulse 250 nV-sec typ DAC alternatively loaded with 00 … 00 and 111 … 11. VOUT loaded. LDAC permanently low. BIN/COMP set to 1. VREF− = −5 V. 150 nV-sec typ LDAC frequency = 100 kHz. AC Feedthrough 1 mV p-p typ VREF− = 0 V, VREF+ = 1 V rms, 10 kHz sine wave. DAC loaded with all 0s. BIN/COMP set to 0. Digital Feedthrough 5 nV-sec typ DAC alternatively loaded with all 1s and 0s. SYNC high. Output Noise Voltage Density, 1 kHz to 100 kHz 80 nV/√Hz typ Measured at VOUT. VREF+ = VREF− = 0 V. BIN/COMP set to 0. 1 LDAC = 0. Settling time does not include deglitching time of 5 μs (typical). TIMING CHARACTERISTICS VDD = 14.25 V to 15.75 V; VSS = −14.25 V to −15.75 V; VCC = 4.75 V to 5.25 V; RL = 2 kΩ, CL = 200 pF. All specifications TMIN to TMAX, unless otherwise noted. Guaranteed by characterization. All input signals are specified tr = tf = 5 ns (10% to 90% of 5 V and timed from a voltage level of 1.6 V. Table 4. Parameter Limit at 25°C (All Versions) Limit at TMIN, TMAX (All Versions) Unit Test Conditions/Comments t11 200 200 ns min SCLK cycle time t2 50 50 ns min SYNC-to-SCLK setup time t3 70 70 ns min SYNC-to-SCLK hold time t4 10 10 ns min Data setup time t5 40 40 ns min Data hold time t62 80 80 ns max SCLK falling edge to SDO valid t7 80 80 ns min LDAC, CLR pulse width tr 30 30 μs max Digital input rise time tf 30 30 μs max Digital input fall time 1 SCLK mark/space ratio range is 40/60 to 60/40. 2 SDO load capacitance is 50 pF. |
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