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AD7951BSTZRL Folha de dados(PDF) 6 Page - Analog Devices

Nome de Peças AD7951BSTZRL
Descrição Electrónicos  14-Bit, 1 MSPS, Unipolar/Bipolar Programmable Input PulSAR ADC
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Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
Logo AD - Analog Devices

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AD7951
Data Sheet
Rev. A | Page 6 of 32
Parameter
Symbol
Min
Typ
Max
Unit
SLAVE SERIAL/SERIAL CONFIGURATION INTERFACE MODES2
(See Figure 42, Figure 43, and Figure 45)
External SDCLK, SCCLK Setup Time
t31
5
ns
External SDCLK Active Edge to SDOUT Delay
t32
2
18
ns
SDIN/SCIN Setup Time
t33
5
ns
SDIN/SCIN Hold Time
t34
5
ns
External SDCLK/SCCLK Period
t35
25
ns
External SDCLK/SCCLK High
t36
10
ns
External SDCLK/SCCLK Low
t37
10
ns
1 In warp mode only, the time between conversions is 1 ms; otherwise, there is no required maximum time.
2 In serial interface modes, the SDSYNC, SDSCLK, and SDOUT timings are defined with a maximum load CL of 10 pF; otherwise, the load is 60 pF maximum.
3 In serial master read during convert mode. See Table 4 for serial master read after convert mode.
Table 4. Serial Clock Timings in Master Read After Convert Mode
DIVSCLK[1]
0
0
1
1
DIVSCLK[0]
Symbol
0
1
0
1
Unit
SYNC to SDCLK First Edge Delay Minimum
t18
3
20
20
20
ns
Internal SDCLK Period Minimum
t19
30
60
120
240
ns
Internal SDCLK Period Maximum
t19
45
90
180
360
ns
Internal SDCLK High Minimum
t20
12
30
60
120
ns
Internal SDCLK Low Minimum
t21
10
25
55
115
ns
SDOUT Valid Setup Time Minimum
t22
4
20
20
20
ns
SDOUT Valid Hold Time Minimum
t23
5
8
35
90
ns
SDCLK Last Edge to SYNC Delay Minimum
t24
5
7
35
90
ns
BUSY High Width Maximum
t28
Warp Mode
1.60
2.35
3.75
6.75
μs
Normal Mode
1.85
2.60
4.00
7.00
μs
Impulse Mode
2.10
2.85
4.25
7.25
μs
NOTES
1. IN SERIAL INTERFACE MODES, THE SYNC, SCLK, AND
SDOUT ARE DEFINED WITH A MAXIMUM LOAD
CL OF 10pF; OTHERWISE, THE LOAD IS 60pF MAXIMUM.
1.6mA
IOL
500µA
IOH
1.4V
TO OUTPUT
PIN
CL
60pF
Figure 2. Load Circuit for Digital Interface Timing,
SDOUT, SYNC, and SCLK Outputs, CL = 10 pF
0.8V
2V
2V
0.8V
0.8V
2V
tDELAY
tDELAY
Figure 3. Voltage Reference Levels for Timing


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