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AD7928BRUZ-REEL Folha de dados(PDF) 7 Page - Analog Devices

Nome de Peças AD7928BRUZ-REEL
Descrição Electrónicos  8-Channel, 1 MSPS, 8-/10-/12-Bit ADCs
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Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
Logo AD - Analog Devices

AD7928BRUZ-REEL Folha de dados(HTML) 7 Page - Analog Devices

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AD7908/AD7918/AD7928
Rev. D | Page 7 of 32
AD7928 SPECIFICATIONS
AVDD = VDRIVE = 2.7 V to 5.25 V, REFIN = 2.5 V, fSCLK = 20 MHz, TA = TMIN to TMAX, unless otherwise noted.
Table 3.
Parameter
B Version1
Unit
Test Conditions/Comments
DYNAMIC PERFORMANCE
fIN = 50 kHz sine wave, fSCLK = 20 MHz
Signal-to-(Noise + Distortion) (SINAD)2
70
dB min
@ 5 V, B models
69.5
dB min
@ 5 V, W models
69
dB min
@ 3 V typically 70 dB
Signal-to-Noise Ratio (SNR)2
70
dB min
B models
69.5
dB min
W models
Total Harmonic Distortion (THD)2
−77
dB max
@ 5 V typically −84 dB
−73
dB max
@ 3 V typically −77 dB
Peak Harmonic or Spurious Noise
−78
dB max
@ 5 V typically −86 dB
(SFDR)2
−76
dB max
@ 3 V typically −80 dB
Intermodulation Distortion (IMD)2
fa = 40.1 kHz, fb = 41.5 kHz
Second-Order Terms
−90
dB typ
Third-Order Terms
−90
dB typ
Aperture Delay
10
ns typ
Aperture Jitter
50
ps typ
Channel-to-Channel Isolation2
−85
dB typ
fIN = 400 kHz
Full Power Bandwidth
8.2
MHz typ
@ 3 dB
1.6
MHz typ
@ 0.1 dB
DC ACCURACY2
Resolution
12
Bits
Integral Nonlinearity
±1
LSB max
Differential Nonlinearity
−0.9/+1.5
LSB max
Guaranteed no missed codes to 12 bits
0 V to REFIN Input Range
Straight binary output coding
Offset Error
±8
LSB max
Typically ±0.5 LSB
Offset Error Match
±0.5
LSB max
Gain Error
±1.5
LSB max
Gain Error Match
±0.5
LSB max
0 V to 2 × REFIN Input Range
−REFIN to +REFIN biased about REFIN with twos
complement output coding
Positive Gain Error
±1.5
LSB max
Positive Gain Error Match
±0.5
LSB max
Zero Code Error
±8
LSB max
Typically ±0.8 LSB
Zero Code Error Match
±0.5
LSB max
Negative Gain Error
±1
LSB max
Negative Gain Error Match
±0.5
LSB max
ANALOG INPUT
Input Voltage Ranges
0 to REFIN
V
RANGE bit set to 1
0 to 2 × REFIN
V
RANGE bit set to 0, AVDD/VDRIVE = 4.75 V to 5.25 V
DC Leakage Current
±1
μA max
Input Capacitance
20
pF typ
REFERENCE INPUT
REFIN Input Voltage
2.5
V
±1% specified performance
DC Leakage Current
±1
μA max
REFIN Input Impedance
36
kΩ typ
fSAMPLE = 1 MSPS
LOGIC INPUTS
Input High Voltage, VINH
0.7 × VDRIVE
V min
Input Low Voltage, VINL
0.3 × VDRIVE
V max
Input Current, IIN
±1
μA max
Typically 10 nA, VIN = 0 V or VDRIVE
Input Capacitance, CIN3
10
pF max


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