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AD7888ARZ-REEL7 Folha de dados(PDF) 9 Page - Analog Devices |
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AD7888ARZ-REEL7 Folha de dados(HTML) 9 Page - Analog Devices |
9 / 17 page AD7888 –9– TYPICAL CONNECTION DIAGRAM Figure 8 shows a typical connection diagram for the AD7888. Both AGND pins are connected to the analog ground plane of the system. VREF is connected to a well decoupled VDD pin to provide an analog input range of 0 V to VDD. The conversion result is output in a 16-bit word with four leading zeroes fol- lowed by the MSB of the 12-bit result. For applications where power consumption is of concern, the automatic power down at the end of conversion should be used to improve power perfor- mance. See Modes of Operation section of the data sheet. DOUT DIN SCLK CS C/ P AIN1 AIN2 AIN8 AGND AGND 0.1 F 10 F SUPPLY 2.7V TO 5.25V 0V TO REF IN/ REF OUT INPUT SERIAL INTERFACE REF IN/ REF OUT VDD AD7888 Figure 8. Typical Connection Diagram Analog Input Figure 9 shows an equivalent circuit of the analog input structure of the AD7888. The two diodes D1 and D2 provide ESD pro- tection for the analog inputs. Care must be taken to ensure that the analog input signal never exceeds the supply rails by more than 200 mV. This will cause these diodes to become forward- biased and start conducting current into the substrate. 20 mA is the maximum current these diodes can conduct without causing irreversible damage to the part. However, it is worth noting that a small amount of current (1 mA) being conducted into the substrate due to an overvoltage on an unselected channel, can cause inaccurate conversions on a selected channel. The capaci- tor C1 in Figure 9 is typically about 4 pF and can primarily be attributed to pin capacitance. The resistor R1 is a lumped com- ponent made up of the on resistance of a multiplexer and a switch. This resistor is typically about 100 Ω. The capacitor C2 is the ADC sampling capacitor and has a capacitance of 20 pF typically. Note: The analog input capacitance seen when the track and hold is in track mode is typically 38 pF, while in hold mode it is typically 4 pF. VIN VDD D2 R1 C1 4pF CONVERSION PHASE – SWITCH OPEN TRACK PHASE – SWITCH CLOSED D1 C2 20pF Figure 9. Equivalent Analog Input Circuit For ac applications, removing high frequency components from the analog input signal is recommended by use of an RC low- pass filter on the relevant analog input pin. In applications where harmonic distortion and signal to noise ratio are critical the analog input should be driven from a low impedance source. Large source impedances will significantly affect the ac perfor- mance of the ADC. This may necessitate the use of an input buffer amplifier. The choice of the op amp will be a function of the particular application. When no amplifier is used to drive the analog input the source impedance should be limited to low values. The maximum source impedance will depend on the amount of total harmonic distortion (THD) that can be tolerated. The THD will increase as the source impedance increases and performance will degrade. Figure 10 shows a graph of the total harmonic distortion versus analog input signal frequency for different source impedances. INPUT FREQUENCY – kHz –90 0.15 42.14 10.89 31.59 21.14 –85 –80 –75 –70 –65 49.86 THD vs. FREQUENCY FOR DIFFERENT SOURCE IMPEDANCES VDD = 5V 5V EXT REFERENCE RIN = 1k , CIN = 100pF RIN = 50 , CIN = 2.2nF RIN = 10 , CIN = 10nF Figure 10. THD vs. Analog Input Frequency Analog Input Selection On power-up, the default AIN selection is AIN1. When returning to normal operation from power-down, the AIN selected will be the same one that was selected prior to power-down being initi- ated. Table II below shows the multiplexer address correspond- ing to each analog input from AIN1 to AIN8 for the AD7888. Table II. Channel Configurations ADD2 ADD1 ADD0 Analog Input Channel 0 0 0 AIN1 0 0 1 AIN2 0 1 0 AIN3 0 1 1 AIN4 1 0 0 AIN5 1 0 1 AIN6 1 1 0 AIN7 1 1 1 AIN8 On-Chip Reference The AD7888 has an on-chip 2.5 V reference. This reference can be enabled or disabled by clearing or setting the REF bit in the Control Register, respectively. If the on-chip reference is to be used externally in a system, it must be buffered before it is applied elsewhere. If an external reference is applied to the device, the internal reference is automatically overdriven. However, in REV. C |
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