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74LVC821A Folha de dados(PDF) 9 Page - List of Unclassifed Manufacturers |
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74LVC821A Folha de dados(HTML) 9 Page - List of Unclassifed Manufacturers |
9 / 20 page 9397 750 13276 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 03 — 11 May 2004 9 of 20 Philips Semiconductors 74LVC821A 10-bit D-type flip-flop with 5 V tolerant inputs/outputs [1] All typical values are measured Tamb =25 °C. [2] These typical values are measured at VCC = 3.3 V. 11. Dynamic characteristics Table 8: Dynamic characteristics GND = 0 V; tr =tf ≤ 2.5 ns; CL = 50 pF; RL = 500 Ω; for test circuit see Figure 10 Symbol Parameter Conditions Min Typ Max Unit Tamb = −40 °C to +85 °C [1] tPHL, tPLH propagation delay CP to Qn see Figure 7 VCC = 1.2 V - 18 - ns VCC = 2.7 V 1.5 - 8.5 ns VCC = 3.0 V to 3.6 V [2] 1.5 3.7 7.3 ns tPZH, tPZL 3-state output enable time OE to Qn see Figure 9 VCC = 1.2 V - 20 - ns VCC = 2.7 V 1.5 - 8.8 ns VCC = 3.0 V to 3.6 V [2] 1.3 3.5 7.6 ns tPHZ, tPLZ 3-state output disable time OE to Qn see Figure 9 VCC = 1.2 V - 9.0 - ns VCC = 2.7 V 1.5 - 6.8 ns VCC = 3.0 V to 3.6 V [2] 1.5 3.0 6.2 ns tW clock pulse width HIGH or LOW see Figure 7 VCC = 1.2 V - - - ns VCC = 2.7 V 3.3 - - ns VCC = 3.0 V to 3.6 V [2] 3.3 1.7 - ns tsu set-up time Dn to CP see Figure 8 VCC = 1.2 V - - - ns VCC = 2.7 V 0.9 - - ns VCC = 3.0 V to 3.6 V [2] 1.9 0.6 - ns th hold time Dn to CP see Figure 8 VCC = 1.2 V - - - ns VCC = 2.7 V 1.5 - - ns VCC = 3.0 to 3.6 V [2] 1.5 0.0 - ns fmax maximum clock frequency see Figure 7 VCC = 1.2 V - - - MHz VCC = 2.7 V 150 - - MHz VCC = 3.0 V to 3.6 V [2] 150 200 - MHz tsk(0) skew VCC = 3.0 V to 3.6 V [3] - - 1.0 ns CPD power dissipation capacitance per gate VCC = 3.3 V [4] [5] outputs enabled - 17 - pF outputs disabled - 11 - pF |
Nº de peça semelhante - 74LVC821A_1 |
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Descrição semelhante - 74LVC821A_1 |
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