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TSB43AA82GHH Folha de dados(PDF) 2 Page - Texas Instruments |
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TSB43AA82GHH Folha de dados(HTML) 2 Page - Texas Instruments |
2 / 5 page www.ti.com TSB43AA82 TSB43AA82I SLLA204 – JUNE 2006 The features of the TSB43AA82 support the serial bus protocol 2 (SBP-2). It handles up to four initiators with the SBP-2 transaction/timer manager. This SBP-2 transaction engine supports fully automated operation request block (ORB) fetches and fully automated memory page table fetches for both read and write transactions. Automated responses to other node requests are provided; this includes responding to another node’s read request to the Config ROM and issuing ack_busy_X for a single retry. Various control registers enable the user to program IEEE 1394 asynchronous transaction settings. The user can program the number of retries and the split transaction time-out value by setting the time limit register in the CFR. The TSB43AA82 also supports the direct print protocol (DPP). The asynchronous receive FIFO (ARF) in the TSB43AA82 is large enough to satisfy the connection register area, the DRF receiving FIFO can be used as the segment data unit (SDU) register to fulfill the large data transfer. This document is not intended to serve as a tutorial on IEEE 1394; users are referred to IEEE Std 1394-1995 and IEEE 1394a-2000(1). NOTE: This product is for high-volume CE applications only. For a complete datasheet or more information contact support@ti.com. (1) IEEE Std 1394-1995, IEEE Standard for a High Performance Serial Bus IEEE Std 1394a–2000, IEEE Standard for a High Performance Serial Bus – Amendment 1 2 Submit Documentation Feedback |
Nº de peça semelhante - TSB43AA82GHH |
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Descrição semelhante - TSB43AA82GHH |
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