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LA4425A Folha de dados(PDF) 7 Page - ON Semiconductor |
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LA4425A Folha de dados(HTML) 7 Page - ON Semiconductor |
7 / 9 page LA4425A No.A0195-7/9 Instructions and Precautions • Connect a capacitor of 1000pF across pins and for external disturbance path. • Be careful of the ground line artwork when laying out the printed circuit pattern. Arrange so that the Sg route and load current flow-in route do not overlap. Refer to the recommended printed circuit pattern or make slits, etc. at pins and . DUAL Printed Circuit Pattern Example • Short Circuit Tests Our company's recommended printed circuit board: Apply VCC=13.2V using a 30×30×1.5mm 3 thick aluminum board. The IC will be protected from the DC/AC shorting of switches 1 to 4 above. However, be careful not to damage the IC by turning VCC ”ON” when DC short (SW 1 or SW 2) is on. • Power Supply Positive Surge The over-voltage protector (VCCX ≈ 21.5V) inside the IC is used to cut all bias routes and reverse bias between B-E of output stage elements, in order to increase the power line’s capability of handling positive surge. This means, of course, that a VCES (VCBO) type output stage element is used instead of the VCEO (VCER) type. + + 0.15 μF 2.2 μF 1000 μF Rg 620 Ω 13.2V LA4425A RL JASO tester Application of giant pulse SW1 SW3 13.2V SW2 SW4 LA4425A + + + OUT1 VCC OUT2 IN1 GND GND IN2 1 1 Cu-foiled side 45.0 ×75.0mm2 |
Nº de peça semelhante - LA4425A |
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Descrição semelhante - LA4425A |
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