1

2

3

4

5

6

7

8

9

10

11

12

13

14 15 16 17 18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

INH/UVLO

PWRGD

OCP_SEL

DNC

RT/CLK

VIN

SS/TR

STSEL

ISHARE

ILIM

SYNC_OUT

PVIN

SENSE+

VADJ

AGND

AGND

PVIN

VOUT

PH

40

41

42

PGND

DNC

PGND

DNC

PH

LMZ31710

www.ti.com

SNVS987A – JULY 2013 – REVISED JULY 2013

Table 2. PIN DESCRIPTIONS (continued)

TERMINAL

DESCRIPTION

NAME

NO.

Slow-start and tracking pin. Connecting an external capacitor to this pin adjusts the output voltage rise time.

SS/TR

28

A voltage applied to this pin allows for tracking and sequencing control.

Slow-start or track feature select. Connect this pin to AGND to enable the internal SS capacitor. Leave this

STSEL

29

pin open to enable the TR feature.

Inhibit and UVLO adjust pin. Use an open drain or open collector logic device to ground this pin to control

INH/UVLO

30

the INH function. A resistor divider between this pin, AGND, and PVIN/VIN sets the UVLO voltage.

RVQ PACKAGE

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