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AD8123ACPZ1 Folha de dados(PDF) 11 Page - Analog Devices |
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AD8123ACPZ1 Folha de dados(HTML) 11 Page - Analog Devices |
11 / 16 page AD8123 Rev. A | Page 11 of 16 APPLICATIONS INFORMATION BASIC OPERATION The AD8123 is easy to apply because it contains everything on-chip needed for cable loss compensation. Figure 20 shows a basic application circuit (power supplies not shown) with common-mode sync pulse extraction that is compatible with the common-mode sync pulse encoding technique used in the AD8134, AD8147, and AD8148 triple differential drivers. If sync extraction is not required, the terminations can be single 100 Ω resistors, and the comparator inputs can be left floating. In Figure 20, the AD8123 is feeding a high impedance input, such as a delay line or crosspoint switch, and the additional gain of two that makes up for double termination loss is not required. COMPARATORS In addition to general-purpose applications, the two on-chip comparators can be used to extract video sync pulses from the received common-mode voltages or to receive differential digital information. Built-in hysteresis helps to eliminate false triggers from noise. The Sync Pulse Extraction Using Comparators section describes the sync extraction details. The comparator outputs have nearly 0 Ω output impedance and are designed to drive source-terminated transmission lines. The source termination technique uses a resistor in series with each comparator output such that the sum of the comparator source resistance (≈0 Ω) and the series resistor equals the transmission line characteristic impedance. The load end of the transmission line is high impedance. When the signal is launched into the source termination, its initial value is one-half of its source value because its amplitude is divided by two in the voltage divider formed by the source termination and the transmission line. At the load, the signal experiences nearly 100% positive reflection due to the high impedance load and is restored to nearly its full value. This technique is commonly used in PCB layouts that involve high speed digital logic. Figure 19 shows how to apply the comparators with source termination when driving a 50 Ω transmission line that is high impedance at its receive end. 49.9Ω HIGH-Z Z0 = 50Ω Figure 19. Using Comparator with Source Termination 18 RED BLUE GREEN CMV RED CMV BLUE CMV AD8123 15 12 6 4 VPEAK 26 25 27 23 28 VPOLE VOFFSET VGAIN HSYNC OUT VSYNC OUT 32 31 GREEN 35 34 38 37 3 2 7 8 RECEIVED RED VIDEO RECEIVED GREEN VIDEO RECEIVED BLUE VIDEO RED VIDEO OUT GREEN VIDEO OUT BLUE VIDEO OUT ANALOG CONTROL INPUTS POWER DOWN CONTROL GND REFERENCE 24, 39 PD 1 2 1kΩ 1kΩ 49.9Ω 49.9Ω 49.9Ω 475Ω 49.9Ω 49.9Ω 49.9Ω 47pF 47pF Figure 20. Basic Application Circuit with Common-Mode Sync Extraction |
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