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CS5106 Folha de dados(PDF) 8 Page - Cherry Semiconductor Corporation

Nome de Peças CS5106
Descrição Electrónicos  Multi-Feature, Synchronous plus Auxiliary PWM Controller
Download  12 Pages
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Fabricante Electrônico  CHERRY [Cherry Semiconductor Corporation]
Página de início  http://www.cherrycorp.com/
Logo CHERRY - Cherry Semiconductor Corporation

CS5106 Folha de dados(HTML) 8 Page - Cherry Semiconductor Corporation

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Block Diagram
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+
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V
V
V
V
V
V
V
V
V
V
V
OUVDELAY
OAOUT
OAM
VSS
Aux. Error Amp
A1
1.2V
+
5k
45k
VCC
D1
Output
Undervoltage
Timer
V5REF
100k
P1
RUN1
RUN 2
G6
C9
VREFOK
VFB1
SYNCIN
PROGRAM
ENABLE
UVSD
SYNCOUT
DYLSET
FADJ
RAMP2
GATE2
GATE2B
ILIM2
VFB2
A2
A2
G1
VREFOK
RUN 1
VSS
G7
G3
C1
G8
FREQ
TOO LOW
Aux.PWM
Comparator
VREFOK Comparator
Main PWM
Comparator
Sync Detection
Main 2nd Current
Threshold Comparator
Aux. 2nd Current
Threshold Comparator
Aux. Current
Limit Comparator
Main Current
Limit Comparator
C11
1.2V
V
Skip Two
Clock Pulses
SET
CLOCK
SET
CLOCK
Skip Two
Clock Pulses
G15
C17
C16
Skip2B
G14
G18
1.4V
GATE1
Gnd
ILIM1
RSFF
QR
F2
S
TPERIOD
DRIVER
C10
C12
C13
OSC
IFSET
CLK1
CLK2
IDSET
SYNCIN
SYNCOUT
C8
C5
OVSD
+
-
G13
C14
G16
G17
C15
DELAY
DELAY
G12
RUN2
RUN2
1.7V
+
DRIVER
Reset
Dominant
G11
G10
G9
VREF
ENABLE
VREF=5V
VCC
5V
C2
RSFF
RQ
S
F1
Set Dominant
+
-
Over Voltage
Comparator
VSS Restart
Comparator
Reset
Dominant
RSFF
Q
F3
S
R
Reset
Dominant
RSFF
Q
F4
S
R
+
-
C4
-
+
C7
Skip2B
ENABLE
Comparator
Under Voltage
Comparator
R
2R
G5
G4
DRIVER
TFF
T1
Q
+
0.13V
0.13V
+
START
STOP
R
2R
RUN1
+ 1.5V
Fault Latch
C3
+
-
FREQ
TOO HIGH
1.4V
5V
4.5
7.4/6.8V
1.4V
RAMP1
1.4V
Q
Theory of Application
Powering the IC
The IC has one supply, VCC, and one Ground lead. If VSS is
used for a bootstrapped supply the diode between VSS and
VCC is forward biased, and the IC will derive its power
from VSS. The internal logic monitors the supply voltage,
VCC. During abnormal operating conditions, all GATE
drivers are held in a low state. The CS5106 requires 1.5mA
nominal of startup current.
Startup
Assume the part is enabled and there are no over voltage
or under voltage faults present. Also, assume that all auxil-
iary and main regulated output voltages start at 0V. An
8V, Zener referenced supply is typically applied to VCC.
When VCC exceeds 7.5V, the 5V reference is enabled and
the OSC begins switching. If the V5REF lead is not exces-
sively loaded such that V5REF < 4.5V nominal, ÔVREFOKÕ
goes ÔhighÕ and ÔRUN1Õ will go ÔhighÕ, releasing GATE1
from its low state. After GATE1 is released, it begins
switching according to conditions set by the auxiliary con-
trol loop and the auxiliary supply, VSS begins to rise.
When VSS > VCC + V(D1), P1 turns on and ÔRUN2Õ goes
ÔhighÕ, releasing GATE2 and GATE2B from their low state.
GATE2 and GATE2B begin switching according to condi-
tions set by the main control loop and the main regulated
output begins to rise. See startup waveforms in Figure 1.
Soft Start
Soft start for the auxiliary power supply is accomplished
by placing a capacitor between OAOUT and Ground. The
error amplifier has 200µA of nominal of source current and
is ideal for setting up a Soft Start condition for the auxiliary
regulator. Care should be taken to make sure that the soft
start timing requirements are not in conflict with any tran-
sient load requirements for the auxiliary supply as large
capacitors on OAOUT will slow down the loop response.
Also, the Soft start capacitor must be chosen such that dur-
ing start or restart, both outputs will come into regulation
before the OUVDELAY timer trips. Soft Start for the main
supply is accomplished by charging soft start capacitor C6
through D5 and R7 at start up. After the main supply has
come into regulation C6 continues to charge and is discon-
nected from the feedback loop by D8.
Theory of Operation


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