CS5106LSWR24 datasheet(6/12 Pages) CHERRY

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CS5106LSWR24 Folha de dados(PDF) 6 Page - Cherry Semiconductor Corporation

Nome de Peças	CS5106LSWR24

Descrição Electrónicos	Multi-Feature, Synchronous plus Auxiliary PWM Controller

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Fabricante Electrônico	CHERRY [Cherry Semiconductor Corporation]

Página de início	http://www.cherrycorp.com/

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Package Lead Description

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Electrical Characteristics: TJ = -40¡C to 125¡C, VSS = 9 to 16V, V5REF ILOAD = 2mA, SYNCOUT Free Running, unless other-

wise specified. For All Specs: UVSD=6V, OVSD = 0V, ENABLE = 0V, ILIM(1,2) = 0,VFB(1,2) = 3V,RFADJ = RDLYSET = 27.4k½.

PACKAGE LEAD #

LEAD SYMBOL

FUNCTION

s GATE 2, 2B Non-Overlap Delay

GATE2 Turn-on Delay

Measure delay from GATE2B going low

20.0

45.0

70.0

from GATE2B

@1.7V to GATE2 going high @1.7V.

GATE2B Turn-on Delay

Measure delay from GATE2 going low

20.0

45.0

70.0

from GATE2

@1.7V to GATE2B going high @1.7V.

s GATE 1, 2, 2B Rise & Fall Times VSS=12V,VCC=VSS-VDON

GATE1 Rise Time

Measure GATE1 Rise Time from

50.0

80.0

90% to 10%. CLOAD = 150pF.

GATE1 Fall Time

Measure GATE1 Fall Time from

10% to 90%. CLOAD = 150pF.

30.0

60.0

GATE2 Rise Time

Measure GATE2 Rise Time from

90% to10%. CLOAD = 50pF.

50.0

80.0

GATE2 Fall Time

Measure GATE2 Fall Time from

10% to 90%. CLOAD = 50pF.

15.0

30.0

GATE2B Rise Time

Measure GATE2B Rise Time from

90% to10%. CLOAD = 50pF.

50.0

80.0

GATE2B Fall Time

Measure GATE2B Fall Time from

10% to 90%. CLOAD = 50pF.

15.0

30.0

UVSD

Undervoltage shutdown lead. Typically this lead is connected through a

resistor divider to the main high voltage (VIN) line. If the voltage on this lead

is less than 5V then a fault is initiated such that GATE1, GATE2 and GATE2B

go low.

OVSD

Overvoltage shutdown lead. Typically this lead is connected through a resistor

divider to the main high voltage (VIN) line. If the voltage on this lead exceeds

5V then a fault is initiated such that GATE1, GATE2 and GATE2B go low.

3V5REF

5V reference output lead. Capable of 20mA nominal output. If this lead falls

to 4.5V, a fault is initiated such that GATE1, GATE2 and GATE2B go low.

OAM

Auxiliary error amplifier minus input. This lead is compared to 1.2V nominal

on the auxiliary error amp plus lead and represents the VSS voltage divided

by ten.

OAOUT

Auxiliary error amplifier output lead. Source current 300µA max.

OUVDELAY

Output undervoltage timing capacitor lead. If the controlled output voltages

of either the main or the auxiliary supply are such that either VFB1 or VFB2 is

greater that 4.1V nominal, then capacitor from OUVDELAY to ground will

begin charging. If the over voltage duration is such that the OUVDELAY

voltage exceeds 5V, then a fault will be initiated such that GATE1, GATE2

and GATE2B will go low.

7ILIM1

Pulse by pulse over current protection lead for the auxiliary PWM. A voltage

exceeding 1.2V nominal on ILIM1 will cause GATE1 to go low. A voltage

exceeding 1.4V nominal on ILIM1 will cause GATE1 to go low for at least two

clock cycles.

RAMP1

Current Ramp Input Lead for the Auxiliary PWM. A voltage which is linear

with respect to current in the primary side of the auxiliary trans former is

usually represented on this lead. A voltage exceeding VFB1 - 0.13 on RAMP1

will cause GATE1 to go low.

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