CS5111YDWF24 datasheet(8/10 Pages) CHERRY

Nome de Peças	CS5111YDWF24

Descrição Electrónicos	1.4A Switching Regulator with 5V, 100mA Linear Regulator with Watchdog, RESET and ENABLE

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Fabricante Electrônico	CHERRY [Cherry Semiconductor Corporation]

Página de início	http://www.cherrycorp.com/

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8

Application Notes: continued

Step 4

Determine the maximum on time at the minimum oscilla-

tor frequency and VIN. For discontinuous operation, all of

the stored energy in the inductor is transferred to the load

prior to the next cycle. Since the current through the

inductor cannot change instantaneously and the induc-

tance is constant, a volt-second balance exists between the

on time and off time. The voltage across the inductor dur-

ing the on cycle is VIN and the voltage across the inductor

during the off cycle is VOUT - VIN. Therefore:

VINton = (VOUT -VIN)toff

(4a)

where the maximum on time is:

ton(max) ≈

.

(4b)

Step 5

Calculate the maximum inductance allowed for discontin-

uous operation:

L(max) =

(5)

where η = efficiency.

Usually η = 0.75 is a good starting point. The IC’s power

dissipation should be calculated after the peak current has

been determined in Step 6. If the efficiency is less than

originally assumed, decrease the efficiency and recalculate

the maximum inductance and peak current.

Step 6

Determine the peak inductor current at the minimum

inductance, minimum VIN and maximum on time to make

sure the inductor current doesn’t exceed 1.4A.

Ipk =

(6)

Step 7

Determine the minimum output capacitance and maxi-

mum ESR based on the allowable output voltage ripple.

COUT(min) =

(7a)

ESR(min) =

(7b)

In practice, it is normally necessary to use a larger capaci-

tance value to obtain a low ESR. By placing capacitors in

parallel, the equivalent ESR can be reduced.

Step 8

Compensate the feedback loop to guarantee stability

under all operating conditions. To do this, we calculate the

modulator gain and the feedback resistor network attenu-

ation and set the gain of the error amplifier so that the

overall loop gain is 0dB at the crossover frequency, fCO. In

addition, the gain slope should be -20dB/decade at the

crossover frequency.

The low frequency gain of the modulator (i.e. error ampli-

fier output to output voltage) is:

=

√

,

(8a)

where

Ipk(max) =

=

=2.3A.

The VOUT/VEA transfer function has a pole at:

fp = 1/(πRLoadCOUT) ,

(8b)

and a zero due to the output capacitor’s ESR at:

fz = 1/(2πESR COUT).

(8c)

Since the error amplifier reference voltage is 1.25V, the

output voltage must be divided down or attenuated

before being applied to the input of the error amplifier.

The feedback resistor divider attenuation is:

.

The error amplifier in the CS5111 is an operational transcon-

ductance amplifier (OTA), with a gain given by:

GOTA = gmZOUT

(8d)

where:

gm =

.

(8e)

For the CS5111, gm = 2700µA/V typical.

One possible error amplifier compensation scheme is

shown in Figure 9. This gives the error amplifier a gain

plot as shown in Figure 10.

For the error amplifier gain shown in Figure 10, a low fre-

quency pole is generated by the error amplifier output

impedance and C1. This is shown by the line AB with a -

20dB/decade slope in Figure 12. The slope changes to zero

at point B due to the zero at:

fz = 1/(2πR4C1).

(8f)

Figure 9. RC network used to compensate the error amplifier (OTA).

VOUT

VFB1

VFB2

M

U

X

SELECT

Error

Amplifier

1.25V

+

–

C1

R4

C2

R1

R2

R3

∆IOUT

∆VIN

1.25V

VOUT

(2.4V)/(7)

150mΩ

VEA(max)/GCSA

RS

RLoad Lf

2

Ipk(max)

VEA(max)

∆VOUT

∆VEA

∆Vripple

Ipk

8f∆Vripple

VIN(min) ton(max)

L(min)

fSW(min) VIN2(min) ton2(max)

2 POUT/η

]

1

fSW(min)

[]

1 -

VIN(min)

VOUT(max)

[

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