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CS4299-KQ Folha de dados(PDF) 10 Page - Cirrus Logic |
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CS4299-KQ Folha de dados(HTML) 10 Page - Cirrus Logic |
10 / 52 page CS4299 10 2. GENERAL DESCRIPTION The CS4299 is a mixed-signal serial audio Codec compliant to the Intel® Audio Codec ‘97 Specifica- tion, revision 2.1 [1]. It is designed to be paired with a digital controller, typically located on the PCI bus or integrated within the system core logic chip set. The controller is responsible for all com- munications between the CS4299 and the remain- der of the system. The CS4299 contains two distinct functional sections: digital and analog. The digital section includes the AC-link interface, S/PDIF interface, serial data port, Sample Rate Converters, and power management support. The analog section includes the analog input multiplex- er (mux), stereo output mixer, mono output mixer, stereo Analog-to-Digital Converters (ADCs), ste- reo Digital-to-Analog Converters (DACs), and their associated volume controls. 2.1 AC-Link All communication with the CS4299 is established with a 5-wire digital interface to the controller, as shown in Figure 7. This interface is called the AC-link. All clocking for the serial communication is synchronous to the BIT_CLK signal. BIT_CLK is generated by the primary audio codec and is used to clock the controller and any secondary audio co- decs. Both input and output AC-link audio frames are organized as a sequence of 256 serial bits form- ing 13 groups referred to as ‘slots’. During each au- dio frame, data is passed bi-directionally between the CS4299 and the controller. The input frame is driven from the CS4299 on the SDATA_IN line. The output frame is driven from the controller on the SDATA_OUT line. The controller is also re- sponsible for issuing reset commands via the RE- SET# signal. Following a Cold Reset, the CS4299 is responsible for notifying the controller that it is ready for operation after synchronizing its internal functions. The CS4299 AC-link signals must use the same digital supply voltage as the controller chip, either +5 V or +3.3 V. See Section 3, AC Link Frame Definition, for detailed AC-link informa- tion. 2.2 Control registers The CS4299 contains a set of AC ’97 compliant control registers and a set of Cirrus Logic defined control registers. These registers control the basic functions and features of the CS4299. Read access- es of the control registers by the AC ’97 controller are accomplished with the requested register index in Slot 1 of a SDATA_OUT frame. The following SDATA_IN frame will contain the read data in its CODEC SYNC BIT_CLK SDATA_OUT SDATA_IN RESET# Digital AC’97 Controller Figure 7. AC-link Connections |
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