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CS4391 Folha de dados(PDF) 11 Page - Cirrus Logic

Nome de Peças CS4391
Descrição Electrónicos  24-Bit, 192 kHz Stereo DAC with Volume Control?
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Fabricante Electrônico  CIRRUS [Cirrus Logic]
Página de início  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

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CS4391
DS335PP3
11
SWITCHING CHARACTERISTICS - SPI CONTROL PORT
(TA = 25° C; VL = 5.5 to 1.8 Volts; Inputs: logic 0 = AGND, logic 1 = VL, CL = 30 pF)
Notes: 24. tspi only needed before first falling edge of CS after RST rising edge. tspi = 0 at all other times.
25. Data must be held for sufficient time to bridge the transition time of CCLK.
26. For FSCK < 1 MHz
Parameter
Symbol
Min
Max
Unit
SPI Mode
CCLK Clock Frequency
fsclk
-6
MHz
RST Rising Edge to CS Falling
tsrs
500
-
ns
CCLK Edge to CS Falling
(Note 24)
tspi
500
-
ns
CS High Time Between Transmissions
tcsh
1.0
-
µs
CS Falling to CCLK Edge
tcss
20
-
ns
CCLK Low Time
tscl
66
-
ns
CCLK High Time
tsch
66
-
ns
CDIN to CCLK Rising Setup Time
tdsu
40
-
ns
CCLK Rising to DATA Hold Time
(Note 25)
tdh
15
-
ns
Rise Time of CCLK and CDIN
(Note 26)
tr2
-100
ns
Fall Time of CCLK and CDIN
(Note 26)
tf2
-100
ns
t r2
t f2
t dsu t dh
t sch
t scl
CS
CCLK
CDIN
t css
t csh
t spi
t srs
RST
Figure 4. SPI Control Port Timing


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