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FM3164 Folha de dados(PDF) 10 Page - Cypress Semiconductor |
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FM3164 Folha de dados(HTML) 10 Page - Cypress Semiconductor |
10 / 33 page FM3164/FM31256 Document Number: 001-86391 Rev. *C Page 10 of 33 Layout Recommendations The X1 and X2 crystal pins employ very high impedance circuits and the oscillator connected to these pins can be upset by noise or extra loading. To reduce RTC clock errors from signal switching noise, a guard ring must be placed around these pads and the guard ring grounded. SDA and SCL traces should be routed away from the X1 / X2 pads. The X1 and X2 trace lengths should be less than 5 mm. The use of a ground plane on the backside or inner board layer is preferred. See layout example. Red is the top layer, green is the bottom layer. Figure 11. Layout Recommendations Layout for Surface Mount Crystal (red = top layer, green = bottom layer) Layout for Through Hole Crystal (red = top layer, green = bottom layer) VDD SCL SDA X2 X1 PFI VBAK VDD SCL SDA X2 X1 PFI VBAK |
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