LM4930

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SNAS212B – MAY 2004 – REVISED SEPTEMBER 2004

System Control Registers

The LM4930 is controlled with a two-wire serial interface. This interface is used to configure the operating mode,

digital interfaces, and delta-sigma modulators. The LM4930 is controlled by writing information into a series of

write-only registers, each with its own unique 7 bit address. The following registers are programmable:

BASIC CONFIGURATION (XX1000). (Set = logic 1, Clear = logic 0)

BIT

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

RESET

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

Address

Register

Description

3:0

MODE

The LM4930 can be placed in one of several modes that dictate the basic operation. When a new

mode is selected the LM4930 will change operation silently and will re-configure the power

Mode

Mono Speaker

Headphone Left

Headphone Right

Comment

Amplifier Source

Source

Source

0000

None

None

None

Powerdown mode

0001

None

None

None

Standby mode

0010

Voice

None

None

Mono speaker

mode

0011

None

Voice

Voice

Headphone call

mode

0100

Voice

Voice

Voice

Conference call

mode

0101

Audio (L+R)

None

None

L+R mixed to mono

speaker

0110

None

Audio (Left)

Audio (Right)

Headphone stereo

audio

0111

Audio (L+R)

Audio (Left)

Audio (Right)

L+R mixed to mono

speaker + stereo

headphone audio

1000

Audio (Left)

Voice

Voice

Mixed Mode

1001

Voice + Audio (Left) Voice

Voice

Mixed mode

1010

Voice

Audio (Left)

Audio (Left)

Mixed Mode

4

SOFT_RESET

Resets the LM4930, excluding the control registers

5

PCM_LONG

6

PCM_COMPANDED

7

PCM_LAW

8:9

PCM_SYNC_MODE

Sets 1 (00h), 2 (01h) or 4(10h) 16 bit frames per sync. The PCM_SDO pin is tri-stated during the

10

PCM_ALWAYS_ON

This bit should be set if another codec is using the PCM bus. When set, the LM4930 will drive the

11

I2S_M/S

I2S master or slave select. If set then I2S = master. Cleared = slave

12

I2S_RES

I2S resolution select. If set then 32 bits per frame. If cleared then 16 bits per frame

13

RSVD

14

RSVD

15

RSVD

(1)

This register is used to configure the I2S and PCM interfaces as well as the 48kHz DAC module. The 7 bit address for the

BASICCONFIG register is XX10000.

(X = 0 if ADDR is set to logic 0)

(X = 1 if ADDR is set to logic 1)

(2)

With the exception of Standby Mode, rapid switching between modes should be avoided. Rapid switching between modes will not

ensure that the desired mode will be activated.

(3)

It is recommended to alter this bit only while the part is in Powerdown Mode.

(4)

Reserved bits should be set to zero when programming the associated register.

Copyright © 2004, Texas Instruments Incorporated

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