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LM4985 Folha de dados(PDF) 3 Page - Texas Instruments |
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LM4985 Folha de dados(HTML) 3 Page - Texas Instruments |
3 / 33 page 1 2 3 D C B A Controlled Analog Volume Control Interface Output Transient Suppression and Mode- Control Logic Bias Generator - + - + - + Volume Control Volume Control IN1 BYPASS IN2 GND 0.47 PF 0.47 PF CNTGND OUT2 OUT1 VDD I 2 C Digitally Mux Mux Digital Control System LM4985, LM4985TMEVAL www.ti.com SNAS346B – MAY 2006 – REVISED MAY 2006 Figure 3. Typical OCL Output Configuration Circuit Connection Diagram Figure 4. DSBGA Package Top View See NS Package Number YFQ0012 PIN REFERENCE, NAME, AND FUNCTION Reference Name Function A1 ADR I2C serial interface address input. A2 IN2 Analog signal input two. A3 OUT2 Power amplifier two output. B1 SDA I2C serial interface data input. B2 BYPASS The internal VDD/2 ac bypass node. B3 CNTGND In OCL mode, this is the ac ground return. It is biased to VDD/2. Leave unconnected for C- CUPL mode. C1 SCL I2C serial interface clock input. C2 GND The LM4985’s power supply ground input. C3 VDD The LM4985’s power supply voltage input. D1 I2CVDD I2C serial interface power supply input. Can be connected to the same supply that is connected to the VDD pin. D2 IN1 Analog signal input one. D3 OUT1 Power amplifier one output. Copyright © 2006, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LM4985 LM4985TMEVAL |
Nº de peça semelhante - LM4985_14 |
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Descrição semelhante - LM4985_14 |
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