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CDCM6208 Folha de dados(PDF) 7 Page - Texas Instruments |
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CDCM6208 Folha de dados(HTML) 7 Page - Texas Instruments |
7 / 89 page CDCM6208 www.ti.com SCAS931F – MAY 2012 – REVISED APRIL 2014 7.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT Output Supply VDD_Yx_Yy 1.71 1.8/2.5/3.3 3.465 V Voltage Core Analog VDD_PLL1, VDD_PLL2 1.71 1.8/2.5/3.3 3.465 V Supply Voltage Core Digital DVDD 1.71 1.8/2.5/3.3 3.465 V Supply Voltage Reference Input VDD_PRI, VDD_SEC 1.71 1.8/2.5/3.3 3.465 V Supply Voltage VDD power-up ramp time (0 to 3.3 V) PDN left open, all ΔVDD/Δt 50 < tPDN ms VDD tight together PDN low-high is delayed (1) Ambient TA -40 85 °C Temperature SDA and SCL in I2C Mode (SI_MODE[1:0] = 01) DVDD = 1.8 V –0.5 2.45 V Input Voltage VI DVDD = 3.3 V –0.5 3.965 V 100 Data Rate dR kbps 400 High-level input VIH 0.7 x DVDD V voltage Low-level input VIL 0.3 x DVDD V voltage Total capacitive load for each bus CBUS_I2C 400 pF line (1) For fast power up ramps under 50 ms and when all supply pins are driven from the same power supply source, PDN can be left floating. For slower power up ramps or if supply pins are sequenced with uncertain time delays, PDN needs to be held low until DVDD, VDD_PLLx, and VDD_PRI/SEC reach at least 1.45V supply voltage. See application section on mixing power supplies and particularly Figure 59 for details. 7.4 Thermal Information, Airflow = 0 LFM (1) (2) (3) (4) CDCM6208 THERMAL METRIC RGZ UNIT 48 PINS RθJA Junction-to-ambient thermal resistance 30.27 RθJC(top) Junction-to-case (top) thermal resistance 16.58 RθJB Junction-to-board thermal resistance 6.83 °C/W ψJT Junction-to-top characterization parameter 0.23 ψJB Junction-to-board characterization parameter 6.8 RθJC(bot) Junction-to-case (bottom) thermal resistance 1.06 (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. (2) The package thermal resistance is calculated in accordance with JESD 51 and JEDEC2S2P (high-k board). (3) Connected to GND with 36 thermal vias (0.3 mm diameter). (4) θJB (junction to board) is used for the QFN package, the main heat flow is from the junction to the GND pad of the QFN. Copyright © 2012–2014, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: CDCM6208 |
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Descrição semelhante - CDCM6208_14 |
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