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LM3242 Folha de dados(PDF) 5 Page - Texas Instruments |
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LM3242 Folha de dados(HTML) 5 Page - Texas Instruments |
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5 / 28 page  LM3242 www.ti.com SNOSB48D – OCTOBER 2011 – REVISED MARCH 2013 System Characteristics The following spec table entries are ensured by design providing the component values in the Typical Application Circuit are used. These parameters are not ensured by production testing. Min and Max values apply over the full operating ambient temperature range ( −30°C ≤ TA ≤ 90°C) and over the VIN range = 2.7V to 5.5V unless otherwise specified. L = 0.5 µH, DCR = 50 m Ω, CIN = 10 µF, 6.3V, 0603(1608), COUT = 4.7 µF, 6.3V, 0402. Symbol Parameter Condition Min Typ Max Units VIN = 3.7V, VOUT = 1.4V to 3.4V VOUT rise time 0.1 µs < VCON_TR < 1 µs, 9 VCON change to 90% RL = 12Ω TVCON_TR µs VIN = 3.7V, VOUT = 3.4V to 1.4V VOUT fall time 0.1 µs < VCON_TF < 1 µs, 9 VCON change to 10% RL = 12Ω D Maximum Duty cycle 100 % Bypass Mode Resistance VIN = VGS = 3.1V, IOUT = −500 mA RBP 75 m Ω (1) VCON > 1.16V 2.7V ≤ VIN ≤ 5.5V 750 2.5 × VCON ≤ VIN − 285 mV Maximum output current IOUT mA capability 2.7V ≤ VIN ≤ 5.5V 1000 2.5 × VCON ≥ VIN – 165 mV, Bypass mode CVCON VCON input capacitance VCON = 1V, Test frequency = 100 KHz <1.0 pF VOUT −3 +3 % VCON range 0.16V to 0mA ≤ IOUT ≤ 750 mA (2) Linearity 1.44V −50 +50 mV Turn-on time (time for EN = Low-to-High output to reach 95% final TON VIN = 4.2V, VOUT = 3.4V 50 µs value after Enable low-to- IOUT = < 1mA, COUT = 4.7 µF high transition) Auto Bypass Detect TBP, NEG Negative Threshold Delay (3) 10 Time µs TBP, POS Auto Bypass Detect Positive Threshold Delay (4) 0.1 Time VIN = 3.6V, VOUT = 0.8V 75 IOUT = 10 mA, ECO mode VIN = 3.6V, VOUT = 1.8V η Efficiency 90 % IOUT = 200 mA, PWM mode VIN = 3.9V, VOUT = 3.3V 95 IOUT = 500 mA, PWM mode VIN = 3.6V to 4.2V, TR = TF = 10 µs, LINE TR Line transient response 50 mVpk IOUT = 100 mA, VOUT = 0.8V VIN = 3.1V/3.6V/4.5V, VOUT = 0.8V, LOAD TR Load transient response IOUT = 50 mA to 150 mA 50 mVpk TR = TF = 0.1 µs (1) Total resistance in Bypass mode. Total includes the Bypass FET resistance in parallel with the PWM switch path resistance (PFET resistance and series inductor parasistic resistance.) (2) Linearity limits are ±3% or ±50 mV, whichever is larger. VOUT is monotonic in nature with respect to VCON input. (3) Entering Bypass Mode VIN is compared to the programmed output voltage (2.5 × VCON). When VIN − (2.5 × VCON) falls below VBP,NEG longer than TBP,NEG, the Bypass FET turns on, and the switching FET turns on. (4) Bypass Mode is exited when VIN − (2.5 × VCON) exceeds VBP,POS longer than TBP,POS, and PWM mode resumes. The hysteresis for the bypass detection threshold VBP,POS-VBP,NEG will always be positive and will be approximately 50 mV. Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: LM3242 |
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