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TPC1XGJERC00020G Folha de dados(PDF) 4 Page - OPLINK Communications Inc.

Nome de Peças TPC1XGJERC00020G
Descrição Electrónicos  CWDM 40km SFP Transceivers
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Fabricante Electrônico  OPLINK [OPLINK Communications Inc.]
Página de início  http://www.oplink.com
Logo OPLINK - OPLINK Communications Inc.

TPC1XGJERC00020G Folha de dados(HTML) 4 Page - OPLINK Communications Inc.

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TPC1XGJERxG
Oplink Communications, Inc
S0218. Rev.03 (web) 2014-02-24
Application Notes
Module Pin Description
2-wrie serial interface. Upon power up, the 2-wrie interface
appears as NC (no connection), and MOD_ABS is TTL LOW.
When the host system detects this condition, it activates the
serial protocol (standard two-wire I2C serial interface) and
generates the serial clock signal (SCL). The positive edge
clocks data into the EEPROM segments of the device that
are not write protected, and the negative edge clocks data
from the device. The serial data signal (SDA) is for serial data
transfer. The host uses SDA in conjunction with SCL to mark
the start and end of serial protocol activation.The supported
monitoring functions are temperature, voltage, bias current,
transmitter power, average receiver signal, all alarms and
warnings, and software monitoring of TX Fault/LOS. The
device is internally calibrated.
The data transfer protocol and the details of the mandatory
and vendor specific data structures are defined in the SFP
MSA, and SFF-8472, Rev. 10.4.
Power Supply and Grounding: The power supply line
should be well-filtered. All power supply bypass capacitors
should be as close to the transceiver module as possible.
Electrical Interface: All signal interfaces are compliant with
the SFP+ MSA specification. The high speed DATA interface
is differential AC-coupled internally and can be directly
connected to a 3.3V SERDES IC. All low speed control and
sense output signals are open collector TTL compatible and
should be pulled up with a 4.7kΩ - 10kΩ resistor on the host
board.
Loss of Signal (LOS): The Loss of Signal circuit monitors the
level of the incoming optical signal and generates logic HIGH
when an insufficient photocurrent is produced.
TX_Fault: The output indicates LOW when the transmitter
is operating normally and HIGH with a laser fault including
laser end-of-life. TX Fault is an open collector/drain output
and should be pulled up with a 4.7kΩ - 10kΩ resistor on the
host board.
TX_Disable: When the TX Disable pin is at logic HIGH,
the transmitter optical output is disabled. The laser is also
disabled if this line is left floating, as it is pulled high inside
the transceiver.
Serial Identification and Monitoring: The module
definition of SFP is indicated by the MOD_ABS pin and the
Pin
Logic
Symbol
Description
1
-
VeeT
Module Transmitter Ground
2
LVTTL-O
TX_Fault
Module Transmitter Fault
3
LVTTL-I
TX_Disable
Transmitter Disable; Turns off transmitter laser output
4
LVTTL-I/O
SDA
2-Wire Serial Interface Data Line
5
LVTTL-I/O
SCL
2-Wire Serial Interface Clock
6
-
MOD-ABS
Module Definition, Grounded in the module
7
LVTTL-I
RS0
No function implemented
8
LVTTL-O
RX_LOS
Receiver Loss of Signal Indication
9
LVTTL-I
RS1
No function implemented
10
-
VeeR
Module Receiver Ground
11
-
VeeR
Module Receiver Ground
12
CML-O
RD-
Receiver Inverted Data Output
13
CML-O
RD+
Receiver Data Output
14
-
VeeR
Module Receiver Ground
15
-
VccR
Module Receiver 3.3V Supply
16
-
VccT
Module Transmitter 3.3V Supply
17
-
VeeT
Module Transmitter Ground
18
CML-I
TD+
Transmitter Non-Inverted Data Input
19
CML-I
TD-
Transmitter Inverted Data Input
20
-
VeeT
Module Transmitter Ground


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