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TSB41LV03APFP Folha de dados(PDF) 1 Page - Texas Instruments

Nome de Peças TSB41LV03APFP
Descrição Electrónicos  IEEE 1394a THREE-PORT CABLE TRANSCEIVER/ARBITER
Download  11 Pages
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Fabricante Electrônico  TI1 [Texas Instruments]
Página de início  http://www.ti.com
Logo TI1 - Texas Instruments

TSB41LV03APFP Folha de dados(HTML) 1 Page - Texas Instruments

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FEATURES
DESCRIPTION
Not Recommended for New Designs
TSB41LV03A
TSB41LV03AI
SLLA225 – JUNE 2006
IEEE 1394a THREE-PORT CABLE TRANSCEIVER/ARBITER
Register Bits Give Software Control of
Contender Bit, Power Class bits, Link Active
Fully Supports Provisions of IEEE 1394-1995
Control Bit and P1394a Features
Standard for High Performance Serial Bus1
and the P1394a Supplement
Data Interface to Link-Layer Controller
Through 2/4/8 Parallel Lines at 49.152 MHz
Fully Interoperable With FireWire™ and
i.LINK™ Implementation of IEEE Std 1394
Interface to Link Layer Controller Supports
Low Cost TI Bus-Holder Isolation and
Fully Compliant With OpenHCI Requirements
Optional Annex J Electrical Isolation
Provides Three P1394a Fully Compliant Cable
Interoperable With Link-Layer Controllers
Ports at 100/200/400 Megabits per Second
Using 3.3-V and 5-V Supplies
(Mbits/s)
Interoperable With Other Physical Layers
Full P1394a Support Includes: Connection
(PHYs) Using 3.3-V and 5-V Supplies
Debounce, Arbitrated Short Reset, Multispeed
Concatenation, Arbitration Acceleration,
Low Cost 24.576-MHz Crystal Provides
Fly-By Concatenation, Port
Transmit, Receive Data at 100/200/400
Disable/Suspend/Resume
Mbits/s, and Link-Layer Controller Clock at
49.152 MHz
Extended Resume Signaling for Compatibility
With Legacy DV Devices
Incoming Data Resynchronized to Local
Clock
Power-Down Features to Conserve Energy in
Battery Powered Applications Include:
Logic Performs System Initialization and
Automatic Device Power-Down During
Arbitration Functions
Suspend, Device Power-Down Terminal, Link
Encode and Decode Functions Included for
Interface Disable via LPS, and Inactive Ports
Data–Strobe Bit Level Encoding
Powered Down
Separate Cable Bias (TPBIAS) for Each Port
Ultralow-Power Sleep Mode
Single 3.3-V Supply Operation
Node Power Class Information Signaling for
Low Cost High Performance 80-Pin TQFP
System Power Management
(PFP) Thermally Enhanced Package
Cable Power Presence Monitoring
Direct Drop-In Upgrade for TSB41LV03PFP
Cable Ports Monitor Line Conditions for
NOTE:
Implements technology covered by one or more patents
Active Connection to Remote Node
of Apple Computer, Incorporated and SGS Thompson,
Limited.
The TSB41LV03A provides the digital and analog transceiver functions needed to implement a three-port node
in a cable-based IEEE 1394 network. Each cable port incorporates two differential line transceivers. The
transceivers include circuitry to monitor the line conditions as needed for determining connection status, for
initialization and arbitration, and for packet reception and transmission. The TSB41LV03A is designed to
interface with a line layer controller (LLC), such as the TSB12LV21, TSB12LV22, TSB12LV23, TSB12LV31,
TSB12LV41, TSB12LV42, or TSB12LV01A.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
FireWire is a trademark of Apple Computer, Incorporated.
i.LINK is a trademark of Sony Corporation.
PRODUCTION DATA information is current as of publication date.
Copyright © 2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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