AN1001

Vishay Siliconix

www.vishay.com

2

Document Number: 70571

12-Dec-03

Because the TSSOP has a fine pitch foot print, the pad layout

is somewhat more demanding than the layout of the SOIC.

Careful attention must be paid to silkscreen-to-pad and

soldermask-to-pad clearances. Also, fiduciary marks may be

required. The design and spacing of the pads must be dealt

with carefully. The pads must be sized to hold enough solder

paste to form a good joint, but should not be so large or so

placed as to extend under the body, increasing the potential for

solder bridging. The pad pattern should allow for typical pick

and place errors of 0.25 mm. See Application Note 826,

Recommended Minimum Pad Patterns With Outline

Drawing Access

for

Vishay

Siliconix

MOSFETs,

(http://www.vishay.com/doc?72286), for the recommended

pad pattern for PC board layout.

THERMAL ISSUES

LITTLE FOOT TSSOP MOSFETs have been given thermal

ratings using the same methods used for LITTLE FOOT. The

maximum thermal resistance junction-to-ambient is 83_C/W

for the single die and 125_C/W for dual-die parts. TSSOP relies

on a leadframe similar to LITTLE FOOT to remove heat from

the package. The single- and dual-die leadframes are shown

in Figure 4.

Figure 4.

Leadframe

b) 8-Pin Dual-Pad TSSOP

a) 8-Pin Single-Pad TSSOP

The MOSFETs are characterized using a single pulse power

test. For this test the device mounted on a one-square-inch

piece of copper clad FR-4 PC board, such as those shown in

Figure 5. The single pulse power test determines the

maximum amount of power the part can handle for a given

pulse

width

and

defines

the

thermal

resistance

junction-to-ambient. The test is run for pulse widths ranging

from approximately 10 ms to 100 seconds. The thermal

resistance at 30 seconds is the rated thermal resistance for the

part. This rating was chosen to allow comparison of packages

and leadframes. At longer pulse widths, the PC board thermal

charateristics become dominant, making all parts look the

same.

Figure 5.

The actual test is based on dissipating a known amount of

power in the device for a known period of time so the junction

temperature is raised to 150_C. The starting and ending

junction temperatures are determined by measuring the

forward drop of the body diode. The thermal resistance for that

pulse width is defined by the temperature rise of the junction

above ambient and the power of the pulse, DTja/P.

Figure 6 shows the single pulse power curve of the Si6436DQ

laid over the curve of the Si9936DY to give a comparison of the

thermal performance. The die in the two devices have

equivalent die areas, making this a comparison of the

packaging. This comparison shows that the TSSOP package

performs as well as the SOIC out to 150 ms, with long-term

performance being 0.5 W less. Although the thermal

performance is less, LITTLE FOOT TSSOP will operate in a

large percentage of applications that are currently being

served by LITTLE FOOT.

14.0

12.0

10.0

8.0

6.0

4.0

2.0

0.0

0.1

1

10

100

Time (Sec.)

Si6436

Si9936

Figure 6.

Comparison of Thermal Performance

CONCLUSION

TSSOP power MOSFETs provide a significant reduction in PC

board footprint and package height, allowing reduction in

board size and application where SOICs will not fit. This is

accomplished using a standard IC package and a custom

leadframe, combining small size with good power handling

capability.

For the TSSOP-8 package outline visit:

http://www.vishay.com/doc?71201

For the SOIC-8 package outline visit:

http://www.vishay.com/doc?71192