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AD1815 Folha de dados(PDF) 2 Page - Analog Devices |
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AD1815 Folha de dados(HTML) 2 Page - Analog Devices |
2 / 44 page AD1815 –2– REV. 0 TABLE OF CONTENTS FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 PRODUCT OVERVIEW . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 HOST INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 SERIAL INTERFACES . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 ISA INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 APPENDIX A Additional Plug and Play Programming Information . . . . 41 Plug and Play Key & “Alternate Key” Sequences . . . . . . . 42 Reference Designs and Device Drivers . . . . . . . . . . . . . . . 43 FIGURES Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Figure 1. PIO Read Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 2. PIO Write Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 3. DMA Read Cycle . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 4. DMA Write Cycle . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 5. Codec Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 6. DSP Port Timing . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 7. I 2S Serial Port Timing . . . . . . . . . . . . . . . . . . . . . . 8 Figure 8. Reset Pulse Width . . . . . . . . . . . . . . . . . . . . . . . . . 8 Pin Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 9. Serial Interface Right-Justified Mode . . . . . . . . . . 18 Figure 10. Serial Interface I 2S-Justified Mode . . . . . . . . . . . 18 Figure 11. Serial Interface Left-Justified Mode . . . . . . . . . . 18 Figure 12. DSP Serial Interface (Default Frame Rate) . . . . 21 Figure 13. DSP Serial Interface (User Programmed Frame Rate) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 14. DSP Serial Port . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 15. Codec Transfers . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 16. AD1815 Frequency Response Plots . . . . . . . . . . . 43 Outline Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 TABLES Table I. Modem Disabled Timeslot Map . . . . . . . . . . . . . . 19 Table II. Chip Register Diagram . . . . . . . . . . . . . . . . . . . . . 22 Table III. Logical Devices and Compatible Plug and Play Device Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Table IV. Logical Device Configuration . . . . . . . . . . . . . . . 24 Table V. Sound System Direct Registers . . . . . . . . . . . . . . . 24 Table VI. Codec Transfers . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table VII. Indirect Register Map and Reset/Default States 31 Table VIII. Sound System Indirect Registers . . . . . . . . . . . 32 Table IX. Sound Blaster Pro ISA Bus Register . . . . . . . . . . 39 Table X. Adlib ISA Bus Register . . . . . . . . . . . . . . . . . . . . . 39 Table XI. MIDI ISA Bus Register . . . . . . . . . . . . . . . . . . . . 40 Table XII. Game Port ISA Bus Registers . . . . . . . . . . . . . . 40 |
Nº de peça semelhante - AD1815_15 |
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Descrição semelhante - AD1815_15 |
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