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AD7530JN Datasheet(Folha de dados) 6 Page - Intersil Corporation

Nome de Peças. AD7530JN
descrição  10-Bit, 12-Bit, Multiplying D/A Converters
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Fbricantes  INTERSIL [Intersil Corporation]
Página de início  http://www.intersil.com/cda/home
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10-12
Applications
Unipolar Binary Operation
The circuit configuration for operating the AD7520 in unipo-
lar mode is shown in Figure 8. Similar circuits can be used
for AD7521, AD7530 and AD7531. With positive and nega-
tive VREF values the circuit is capable of 2-Quadrant multipli-
cation. The “Digital Input Code/Analog Output Value” table
for unipolar mode is given in Table 1.
Zero Offset Adjustment
1. Connect all digital inputs to GND.
2. Adjust the offset zero adjust trimpot of the output
operational amplifier for 0V at VOUT.
Gain Adjustment
1. Connect all digital inputs to V+.
2. Monitor VOUT for a -VREF (1-2
-N) reading. (N = 10 for
AD7520/30 and N = 12 for AD7521/31).
3. To decrease VOUT, connect a series resistor (0 to 250Ω)
between the reference voltage and the VREF terminal.
4. To increase VOUT, connect a series resistor (0 to 250Ω) in
the IOUT1 amplifier feedback loop.
Bipolar (Offset Binary) Operation
The circuit configuration for operating the AD7520 in the
bipolar mode is given in Figure 9. Similar circuits can be
used for AD7521, AD7530 and AD7531. Using offset binary
digital input codes and positive and negative reference volt-
age values, 4-Quadrant multiplication can be realized. The
“Digital Input Code/Analog Output Value” table for bipolar
mode is given in Table 2.
A “Logic 1” input at any digital input forces the corresponding
ladder switch to steer the bit current to IOUT1 bus. A “Logic 0”
input forces the bit current to IOUT2 bus. For any code the
IOUT1 and IOUT2 bus currents are complements of one
another. The current amplifier at IOUT2 changes the polarity of
IOUT2 current and the transconductance amplifier at IOUT1 out-
put sums the two currents. This configuration doubles the out-
put range. The difference current resulting at zero offset binary
code, (MSB = “Logic 1”, All other bits = “Logic 0”), is corrected
by using an external resistor, (10M
Ω), from VREF to IOUT2.
Offset Adjustment
1. Adjust VREF to approximately +10V.
2. Connect all digital inputs to “Logic 1”.
3. Adjust IOUT2 amplifier offset adjust trimpot for 0V ±1mV at
IOUT2 amplifier output.
4. Connect MSB (Bit 1) to “Logic 1” and all other bits to “Logic 0”.
5. Adjust IOUT1 amplifier offset adjust trimpot for 0V ±1mV at
VOUT.
Gain Adjustment
1. Connect all digital inputs to V+.
2. Monitor VOUT for a -VREF (1-2-
(N-1) volts reading. (N = 10 for
AD7520 and AD7530, and N = 12 for AD7521 and AD7531).
3. To increase VOUT, connect a series resistor of up to 250Ω
between VOUT and RFEEDBACK.
4. To decrease VOUT, connect a series resister of up to 250Ω
between the reference voltage and the VREF terminal.
TABLE 1. CODE TABLE - UNlPOLAR BINARY OPERATION
DIGITAL INPUT
ANALOG OUTPUT
1111111111
-VREF (1-2
-N)
1000000001
-VREF (
1/
2 + 2
-N)
1000000000
-VREF/2
0111111111
-VREF (
1/
2-2
-N)
0000000001
-VREF (2
-N)
0000000000
0
NOTES:
1. LSB = 2-N VREF.
2. N = 10 for 7520, 7530;
N = 12 for 7521, 7531.
15
16
1
5
4
13 3
2
AD7520
BIT 1 (MSB)
BIT 10 (LSB)
14
+15V
VREF
GND
IOUT1
IOUT2
6
VOUT
-
+
RFEEDBACK
DIGITAL
INPUT
FIGURE 8. UNIPOLAR BINARY OPERATION (2-QUADRANT
MULTIPLICATION)
TABLE 2. BlPOLAR (OFFSET BINARY) CODE TABLE
DIGITAL INPUT
ANALOG OUTPUT
1111111111
-VREF (1-2
-(N-1))
1000000001
-VREF (2
-(N-1))
1000000000
0
0111111111
VREF (2
-(N-1))
0000000001
VREF (1-2
-(N-1))
0000000000
VREF
NOTES:
1. LSB = 2-(N-1) VREF.
2. N = 10 for 7520, 7521;
N = 12 for 7530, 7531.
15
16
1
5
4
13 3
2
AD7520
BIT 1
BIT 10
14
+15V
VREF
IOUT2
6
-
+
RFEEDBACK
6
-
+
(MSB)
(LSB)
IOUT1
R1 10K
0.01%
R2 10K
0.01%
R3
10M
FIGURE 9. BIPOLAR OPERATION (4-QUADRANT MULTIPLICATION)
AD7520, AD7530, AD7521, AD7531




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