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AD7523LN Folha de dados(PDF) 5 Page - Intersil Corporation

Nome de Peças AD7523LN
Descrição Electrónicos  8-Bit, Multiplying D/A Converters
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Fabricante Electrônico  INTERSIL [Intersil Corporation]
Página de início  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

AD7523LN Folha de dados(HTML) 5 Page - Intersil Corporation

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10-12
Unipolar Binary Operation - AD7533 (10-Bit DAC)
The circuit configuration for operating the AD7533 in
unipolar mode is shown in Figure 2. With positive and
negative VREF values the circuit is capable of 2-Quadrant
multiplication. The “Digital Input Code/Analog Output Value”
table for unipolar mode is given in Table 2.
Zero Offset Adjustment
1. Connect all digital inputs to GND.
2. Adjust the offset zero adjust trimpot of the output
operational amplifier for 0V
±1mV (Max) at VOUT.
Gain Adjustment
1. Connect all digital inputs to V+.
2. Monitor VOUT for a -VREF (1 - 1/2
10) reading.
3. To increase VOUT, connect a series resistor, R2, (0Ω to
250
Ω) in the IOUT1 amplifier feedback loop.
4. To decrease VOUT, connect a series resistor, R1, (0Ω to
250
Ω) between the reference voltage and the VREF
terminal.
Bipolar (Offset Binary) Operation - AD7523
The circuit configuration for operating the AD7523 in the
bipolar mode is given in Figure 3. Using offset binary digital
input codes and positive and negative reference voltage
values, Four-Quadrant multiplication can be realized. The
“Digital Input Code/Analog Output Value” table for bipolar
mode is given in Table 3.)
A “Logic 1” input at any digital input forces the corresponding
ladder switch to steer the bit current to IOUT1 bus. A “Logic
0” input forces the bit current to IOUT2 bus. For any code the
IOUT1 and IOUT2 bus currents are complements of one
another. The current amplifier at IOUT2 changes the polarity
of IOUT2 current and the transconductance amplifier at IOUT
output sums the two currents. This configuration doubles the
output range. The difference current resulting at zero offset
binary code, (MSB = “Logic 1”, all other bits = “Logic 0”), is
corrected by suing an external resistor, (10M
Ω), from VREF
to IOUT2 (Figure 3).
TABLE 2. UNlPOLAR BINARY CODE - AD7533
DIGITAL INPUT
MSB
LSB
(NOTE 1)
NOMINAL ANALOG OUTPUT
1111111111
1000000001
1000000000
0111111111
0000000001
0000000000
NOTES:
1. VOUT as shown in the Functional Diagram.
2. Nominal Full Scale for the circuit of Figure 2 is given by:
.
3. Nominal LSB magnitude for the circuit of Figure 2 is given by:
.
V
REF
1023
1024
-------------


V
REF
513
1024
-------------


V
REF
512
1024
-------------


V
REF
2
---------------
=
V
REF
511
1024
-------------


V
REF
1
1024
-------------


V
REF
0
1024
-------------


0
=
FS
V
REF
1023
1024
-------------


=
LSB
V
REF
1
1024
-------------


=
TABLE 3. BlPOLAR (OFFSET BINARY) CODE - AD7523
DIGITAL INPUT
MSB
LSB
ANALOG OUTPUT
11111111
10000001
10000000
0
01111111
00000001
00000000
NOTE:
1.
.
V
REF
127
128
----------


V
REF
1
128
----------


+V
REF
1
128
----------


+V
REF
127
128
----------


+V
REF
128
128
----------


1 LSB
2
7
() V
REF
()
1
128
----------

 V
REF
()
==
IOUT2
6
RFEEDBACK
6
-
+
IOUT1
CR1
15
16
1
4
13
3
2
AD7523/
MSB
LSB
14
+15V
VREF
DATA
INPUTS
AD7533
±10V
R3 5K
R4 5K
VOUT
R2
CR2
R1
R6 10M
FIGURE 3. BIPOLAR OPERATION (4-QUADRANT MULTIPLICATION)
-
+
AD7523, AD7533


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