AD9979_15 datasheet(6/56 Pages) AD

Nome de Peças	AD9979

Descrição Electrónicos	14-Bit, CCD Signal Processor with Precision Timing Core

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Fabricante Electrônico	AD [Analog Devices]

Página de início	http://www.analog.com

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AD9979

Rev. C | Page 6 of 56

ANALOG SPECIFICATIONS

AVDD = 1.8 V, fCLI = 65 MHz, typical timing specifications, tMIN to tMAX, unless otherwise noted.

Table 4.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

CDS1

Allowable CCD Reset Transient

0.5

0.8

V

CDS Gain Accuracy

−3.0 dB CDS Gain

–3.7

–3.2

–2.7

dB

0 dB CDS Gain (Default)

–0.9

–0.4

+0.1

dB

+3 dB CDS Gain

+1.9

+2.4

+2.9

dB

+6 dB CDS Gain

+4.3

+4.8

+5.3

dB

Maximum Input Voltage

VGA gain = 6.3 dB, Code 15 (default value)

−3 dB CDS Gain

1.4

V p-p

0 dB CDS Gain (Default)

1.0

V p-p

+3 dB CDS Gain

0.7

V p-p

+6 dB CDS Gain

0.5

V p-p

Allowable Optical Black Pixel Amplitude

0 dB CDS Gain (Default)

–100

+200

mV

+6 dB CDS Gain

–50

+100

mV

VARIABLE GAIN AMPLIFIER (VGA)

Gain Control Resolution

1024

Steps

Gain Monotonicity

Guaranteed

Low Gain Setting

6

dB

VGA Code 15 (default)

Maximum Gain Setting

42

dB

VGA Code 1023

BLACK LEVEL CLAMP

Clamp Level Resolution

1024

Steps

Minimum Clamp Level (Code 0)

0

LSB

Measured at ADC output

Maximum Clamp Level (Code 1023)

1023

LSB

Measured at ADC output

ANALOG-TO-DIGITAL CONVERTER (ADC)

Resolution

14

Bits

Differential Nonlinearity (DNL)

–1.0

± 0.5

+1.2

LSB

No Missing Codes

Guaranteed

Integral Nonlinearity (INL)

5

16

LSB

Full-Scale Input Voltage

2.0

V

VOLTAGE REFERENCE

Reference Top Voltage (REFT)

1.4

V

Reference Bottom Voltage (REFB)

0.4

V

SYSTEM PERFORMANCE

Specifications include entire signal chain

VGA Gain Accuracy

0 dB CDS gain (default)

Low Gain (Code 15)

5.1

5.6

6.1

dB

Gain = (0.0359 × code) + 5.1 dB

Maximum Gain (Code 1023)

41.3

41.8

42.3

dB

Peak Nonlinearity, 500 mV Input Signal

0.1

0.4

%

12 dB total gain applied

Total Output Noise

2

LSB rms

AC grounded input, 6 dB gain applied

Power Supply Rejection (PSR)

45

dB

Measured with step change on supply

1 Input signal characteristics are defined as shown in Figure 2.

200mV MAX

OPTICAL BLACK PIXEL

MINIMUM INPUT LIMIT

(AVSS – 0.3V)

MAXIMUM INPUT LIMIT =

LESSER OF 2.2V

OR (AVDD + 0.3V)

+1.8V TYP (AVDD)

0V (AVSS)

+1.3V TYP (AVDD – 0.5V)

DC RESTORE VOLTAGE

500mV TYP

RESET TRANSIENT

800mV

MAXIMUM

1V MAXIMUM INPUT

SIGNAL RANGE

(0dB CDS GAIN)

Figure 2. Input Signal Characteristics

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