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74LVC32245A Folha de dados(PDF) 1 Page - NXP Semiconductors |
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74LVC32245A Folha de dados(HTML) 1 Page - NXP Semiconductors |
1 / 14 page 1. General description The 74LVC32245A is a 32-bit transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The device features four output enable (nOE) inputs for easy cascading and four send/receive (nDIR) inputs for direction control. Pin nOE controls the outputs so that the buses are effectively isolated. Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices in mixed 3.3 V and 5 V applications. To ensure the high-impedance state during power-up or power-down, pin nOE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. 2. Features and benefits 5 V tolerant inputs/outputs for interfacing with 5 V logic Wide supply voltage range from 2.3 V to 3.6 V CMOS low power consumption MULTIBYTE flow-through standard pin-out architecture Low inductance multiple power and ground pins for minimum noise and ground bounce Direct interface with TTL levels Inputs accept voltages up to 5.5 V High-impedance when VCC =0V Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V) JESD8-5A (2.3 V to 2.7 V) JESD8-C/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115B exceeds 200 V CDM JESD22-C101E exceeds 1000 V Specified from 40 Cto+85 C and 40 Cto+125 C Packaged in plastic fine-pitch ball grid array package 74LVC32245A 32-bit bus transceiver with direction pin; 5 V tolerant; 3-state Rev. 3 — 16 December 2011 Product data sheet |
Nº de peça semelhante - 74LVC32245A_15 |
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Descrição semelhante - 74LVC32245A_15 |
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