Os motores de busca de Datasheet de Componentes eletrônicos
  Portuguese  ▼
ALLDATASHEETPT.COM

X  

GS2970A Folha de dados(PDF) 6 Page - Gennum Corporation

Nome de Peças GS2970A
Descrição Electrónicos  Integrated audio clock generator
Download  150 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrônico  GENNUM [Gennum Corporation]
Página de início  http://www.gennum.com
Logo GENNUM - Gennum Corporation

GS2970A Folha de dados(HTML) 6 Page - Gennum Corporation

Back Button GS2970A Datasheet HTML 2Page - Gennum Corporation GS2970A Datasheet HTML 3Page - Gennum Corporation GS2970A Datasheet HTML 4Page - Gennum Corporation GS2970A Datasheet HTML 5Page - Gennum Corporation GS2970A Datasheet HTML 6Page - Gennum Corporation GS2970A Datasheet HTML 7Page - Gennum Corporation GS2970A Datasheet HTML 8Page - Gennum Corporation GS2970A Datasheet HTML 9Page - Gennum Corporation GS2970A Datasheet HTML 10Page - Gennum Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 150 page
background image
GS2970A 3Gb/s, HD, SD SDI Receiver
Data Sheet
54244 - 2
September 2012
6 of 150
7.3 Marking Diagram .........................................................................................................................147
7.4 Solder Reflow Profiles ................................................................................................................148
7.5 Ordering Information .................................................................................................................148
Revision History ............................................................................................................................................149
List of Figures
Figure 3-1: Digital Input Pin with Schmitt Trigger............................................................................... 24
Figure 3-2: Bidirectional Digital Input/Output Pin..............................................................................24
Figure 3-3: Bidirectional Digital Input/Output Pin with programmable drive strength......... 25
Figure 3-4: XTAL1/XTAL2/XTAL-OUT ................................................................................................... 25
Figure 3-5: VBG .............................................................................................................................................. 25
Figure 3-6: LB_CONT .................................................................................................................................... 26
Figure 3-7: Loop Filter .................................................................................................................................. 26
Figure 3-8: SDI/SDI and TERM .................................................................................................................. 26
Figure 3-9: SDO/SDO .................................................................................................................................... 26
Figure 4-1: Level A Mapping ...................................................................................................................... 27
Figure 4-2: Level B Mapping ...................................................................................................................... 28
Figure 4-3: 27MHz Clock Sources ............................................................................................................ 31
Figure 4-4: PCLK to Data and Control Signal Output Timing - SDR Mode 1 .............................. 34
Figure 4-5: PCLK to Data and Control Signal Output Timing - SDR Mode 2 .............................. 35
Figure 4-6: PCLK to Data and Control Signal Output Timing - DDR Mode ................................. 36
Figure 4-7: DDR Video Interface - 3G Level A ..................................................................................... 39
Figure 4-8: DDR Video Interface - 3G Level B ...................................................................................... 40
Figure 4-9: Delay Adjustment Ranges .................................................................................................... 41
Figure 4-10: Switch Line Locking on a Non-Standard Switch Line ............................................... 43
Figure 4-11: H:V:F Output Timing - 3G Level A and HDTV 20-bit Mode .................................... 47
Figure 4-12: H:V:F Output Timing - 3G Level A and HDTV 10-bit Mode
3G Level B 20-bit Mode, each 10-bit stream ......................................................................................... 47
Figure 4-13: H:V:F Output Timing - 3G Level B 10-bit Mode .......................................................... 48
Figure 4-14: H:V:F Output Timing - HD 20-bit Output Mode ......................................................... 48
Figure 4-15: H:V:F Output Timing - HD 10-bit Output Mode ......................................................... 48
Figure 4-16: H:V:F Output Timing - SD 20-bit Output Mode .......................................................... 48
Figure 4-17: H:V:F Output Timing - SD 10-bit Output Mode .......................................................... 48
Figure 4-18: H:V:DE Output Timing 1280 x 720p @ 59.94/60 (Format 4) ................................... 50
Figure 4-19: H:V:DE Output Timing 1920 x 1080i @ 59.94/60 (Format 5) ................................. 51
Figure 4-20: H:V:DE Output Timing 720 (1440) x 480i @ 59.94/60 (Format 6&7) .................... 52
Figure 4-21: H:V:DE Output Timing 1280 x 720p @ 50 (Format 19) ............................................. 52
Figure 4-22: H:V:DE Output Timing 1920 x 1080i @ 50 (Format 20) ........................................... 53
Figure 4-23: H:V:DE Output Timing 720 (1440) x 576 @ 50 (Format 21 & 22) ........................... 54
Figure 4-24: H:V:DE Output Timing 1920 x 1080p @ 59.94/60 (Format 16) .............................. 54
Figure 4-25: H:V:DE Output Timing 1920 x 1080p @ 50 (Format 31) .......................................... 55
Figure 4-26: H:V:DE Output Timing 1920 x 1080p @ 23.94/24 (Format 32) .............................. 55
Figure 4-27: H:V:DE Output Timing 1920 x 1080p @ 25 (Format 33) .......................................... 56
Figure 4-28: H:V:DE Output Timing 1920 x 1080p @ 29.97/30 (Format 34) .............................. 56
Figure 4-29: 2K Feature Enhancement ................................................................................................... 60
Figure 4-30: Y/1ANC and C/2ANC Signal Timing .............................................................................. 67
Figure 4-31: Ancillary Data Extraction - Step A .................................................................................. 74
Figure 4-32: Ancillary Data Extraction - Step B ................................................................................... 75
Figure 4-33: Ancillary Data Extraction - Step C .................................................................................. 76
Figure 4-34: Ancillary Data Extraction - Step D .................................................................................. 77


Nº de peça semelhante - GS2970A

Fabricante ElectrônicoNome de PeçasFolha de dadosDescrição Electrónicos
logo
Semtech Corporation
GS2970A SEMTECH-GS2970A Datasheet
4Mb / 150P
   3Gb/s, HD, SD SDI Receiver Complete with SMPTE Audio and Video Processing
More results

Descrição semelhante - GS2970A

Fabricante ElectrônicoNome de PeçasFolha de dadosDescrição Electrónicos
logo
Gennum Corporation
GS2971A GENNUM-GS2971A Datasheet
4Mb / 152P
   Integrated audio clock generator
GS1671A GENNUM-GS1671A Datasheet
9Mb / 136P
   Integrated audio clock generator
logo
PhaseLink Corporation
PLL601-26 PLL-PLL601-26 Datasheet
114Kb / 4P
   Audio Clock Generator
logo
Asahi Kasei Microsystem...
AK8128C AKM-AK8128C Datasheet
174Kb / 8P
   Audio Clock Generator
logo
Maxim Integrated Produc...
MAX9485 MAXIM-MAX9485 Datasheet
858Kb / 16P
   Programmable Audio Clock Generator
Rev 0; 7/04
logo
Cypress Semiconductor
W48C20 CYPRESS-W48C20 Datasheet
92Kb / 4P
   Audio Subsystem Clock Generator
logo
Asahi Kasei Microsystem...
AK8128MV AKM-AK8128MV Datasheet
302Kb / 10P
   Multi Clock Generator for Audio
AK8128ME AKM-AK8128ME Datasheet
302Kb / 10P
   Multi Clock Generator for Audio
logo
Integrated Circuit Syst...
ICS9120-47 ICST-ICS9120-47 Datasheet
107Kb / 5P
   Modem and Audio Clock Generator
logo
Asahi Kasei Microsystem...
AK8138MV AKM-AK8138MV Datasheet
310Kb / 10P
   Multi Clock Generator for Audio
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Folha de dados Download

Go To PDF Page


Ligação URL




Privacy Policy
ALLDATASHEETPT.COM
ALLDATASHEET é útil para você?  [ DONATE ] 

Sobre Alldatasheet   |   Publicidade   |   Contato conosco   |   Privacy Policy   |   roca de Link   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com