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TC1728 Folha de dados(PDF) 7 Page - Infineon Technologies AG |
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TC1728 Folha de dados(HTML) 7 Page - Infineon Technologies AG |
7 / 130 page TC1728 Summary of Features Data Sheet 1-2 V1.2, 2014-06 – One General Purpose Timer Array Module (GPTA) providing a powerful set of digital signal filtering and timer functionality to realize autonomous and complex Input/Output management – Two Capture/Compare Unit 6 (CAPCOM6) kernels – Two General Purpose Timer (GPT12) modules • 36 analog input lines for ADC – 2 independent kernels (ADC0 and ADC1) – Analog supply voltage range from 3.3 V to 5 V (single supply) – Broken wire detection • 2 different FADC input channels – channels with impedance control and overlaid with ADC1 inputs – Extreme fast conversion, 21 cycles of fFADC clock – 10-bit A/D conversion (higher resolution can be achieved by averaging of consecutive conversions in digital data reduction filter) • 127 digital general purpose I/O lines (GPIO), 3 input lines • Digital I/O ports with 3.3 V capability • On-chip debug support for OCDS Level 1 (CPU, PCP, DMA, On Chip Bus) • Dedicated Emulation Device chip available (TC1728ED) – multi-core debugging, real time tracing, and calibration – four/five wire JTAG (IEEE 1149.1) or two wire DAP (Device Access Port) interface • Power Management System • Clock Generation Unit with PLL The SAK-TC1728F-192F133HL / SAK-TC1728F-192F133HR has the following features: • High-performance 32-bit super-scalar TriCore V1.3.1 CPU with 4-stage pipeline – Superior real-time performance – Strong bit handling – Fully integrated DSP capabilities – Single precision Floating Point Unit (FPU) – 133 MHz operation at full temperature range • 32-bit Peripheral Control Processor with single cycle instruction (PCP2) – 8 Kbyte Parameter Memory (PRAM) – 24 Kbyte Code Memory (CMEM) – 133 MHz operation at full temperature range • Multiple on-chip memories – 1.5 Mbyte Program Flash Memory (PFLASH) with ECC – 64 Kbyte Data Flash Memory (DFLASH) usable for EEPROM emulation – 120 Kbyte Data Memory (LDRAM) – Instruction Cache: up to 8Kbyte (ICACHE, configurable) – 24 Kbyte Code Scratchpad Memory (SPRAM) – Data Cache: up to 4 Kbyte (DCACHE, configurable) – 8 Kbyte Overlay Memory (OVRAM) |
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