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SM5158A Folha de dados(PDF) 5 Page - Nippon Precision Circuits Inc |
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SM5158A Folha de dados(HTML) 5 Page - Nippon Precision Circuits Inc |
5 / 7 page DIVIDER DATA SETTING PROCEDURE NIPPON PRECISION CIRCUITS-5 SM5158A CLK DATA LE 12 34 5 6 7 8 910 11 12 13 14 15 17 16 MSB LSB Control Input data must be MSB first. Final bit(17th bit) is assigned to the control bit. Data are written into shift register at the ris- ing edge of the CLK signal. When LE is HIGH,data is transferred from the shift register to either the latch of refer- ence divider or input divider. Thus data must be written on the shift register while LE is remaining LOW. While all bits of the N latch to are "0", the N counter will be disabled, DOA, DOP are floating,and the supply current will be decreased. While all bits of the R latch are "O", oscilla- tor will be disabled. While all bits of R and N latches are "0", sup- ply current decreases to 10uA or less. 16 BIT DATA FOR R or N latch Latch select bit ( 1 : R-latch, 0 : N-latch ) |
Nº de peça semelhante - SM5158A |
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Descrição semelhante - SM5158A |
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