ACE9050 datasheet(6/39 Pages) MITEL

Nome de Peças	ACE9050

Descrição Electrónicos	Radio Interface and Twin Synthesiser

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Fabricante Electrônico	MITEL [Mitel Networks Corporation]

Página de início	http://www.mitel.com

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6 / 39 page

6

ACE9030

Parameter

Min.

Typ.

Max.

Unit

Conditions

Synthesiser charge pump current

Current setting resistor R

SMA

19

39

78

k

Ω

Note 3

Current setting resistor R

SC

19

39

78

k

Ω

Note 3

External capacitance on pin R

SMA

5

pF

Ensures stable

External capacitance on pin R

SC

5

pF

bias current.

Bias current I

RSMA (nominally 1·25V / RSMA)

28·8

32

35·2

µAR

SMA = 39 kΩ

Bias current I

RSC (nominally 1·25V / RSC)

28·8

32

35·2

µAR

SC = 39 kΩ

Iprop(0) scaling accuracy, pin PDP

–10

+10

%

@ 200

µA. Note 4

Iprop(1) scaling accuracy, pin PDP

–10

+10

%

@ 800

µA. Note 4

Iint scaling accuracy, pin PDI

–10

+10

%

@ 4 mA. Note 4

Icomp(0) scaling accuracy, pin PDP

–10

+10

%

@ ACC x 0·2

µA

Note 4

Icomp(1) scaling accuracy, pin PDP

–10

+10

%

@ ACC x 0·8

µA

Note 4

Icomp(2) scaling accuracy, pin PDI

–10

+10

%

@ ACC x 4

µA

Note 4

Iauxil scaling accuracy, pin PDA

–5

+5

%

@ 256

µA. Note 4

Auxiliary Charge Pump,

–10

+10

%

Note 5

Up or Down I

AUX current variation

Main Charge Pumps,

–10

+10

%

Note 6

Up or Down I

MAIN or IINTEGRAL current variation

Iprop(0) or Iprop(1) setting from PDP pin

1·0

mA

Iint setting from PDI pin

5

mA

Icomp(0) or Icomp(1) setting from PDP pin

12

µA

Icomp(2) setting from PDI pin

180

µA

Iauxil setting from PDA pin

512

µA

ELECTRICAL CHARACTERISTICS

These characteristics apply over these ranges of conditions (unless otherwise stated):

T

AMB = – 40 °C to + 85 °C, VDD = + 3·6 to + 5·0 V, GND ref. = VSS

D.C. Characteristics (continued)

Notes

3. The circuit is defined with resistors R

SMA and RSC connected from pins RSMA and RSC to VSSSA but in most practical applications all VSS pins

will be connected to a ground plane so R

SMA and RSC should then also be connected to this ground plane.

4. The charge pump currents are specified to this accuracy when the relevant output pin is at a potential of V

DD/2 and with RSMA = 39 kΩ, CN

= 200, L= 1, K = 5, R

SC = 19 kΩ. The nominal value is set by external resistors and by programming registers, as defined in Table 6. Tolerances

in the internal Bandgap voltage and bias circuits are within the limits given for I

RSMA and IRSC, the scaling accuracy of the multiplying DAC’s

is within these limits given for Iprop(0), Iprop(1), Iint, Icomp(0), Icomp(1), Icomp(2), and auxil.

5. The Auxiliary charge pump output voltage is referred to as V

PDA and the output current IAUX is the Up or Down current measured when

V

PDA = VDD/2.

The conditions for the variation limits for the Up current are:

either

I

AUX = 128 or 256 µA

and

0 < V

PDA < VDD – 0·5 V

or

I

AUX = 512 µA

and

0 < V

PDA < VDD – 0·65 V

The conditions for the variation limits for the Down current are:

either

I

AUX = 128 or 256 µA

and

0·5 V < V

PDA < VDD

or

I

AUX = 512 µA

and

0·65 V < V

PDA < VDD

6. The Main charge pump output voltage at pin PDP is referred to as V

PDP and at pin PDI as VPDI. The output currents IMAIN and IINTEGRAL are the

up or down current Iprop(0), Iprop(1) or Iint measured when V

PDP or VDPI = VDD/2.

The conditions for the variation limits for the Up current are :

I

MAIN = 100 to 1000 µA

or I

INTEGRAL = 1 to 5 mA

and 0 < V

PDP < VDD – 0·45 V

The conditions for the variation limits for the Down current are:

I

MAIN = 100 to 1000 µA

or I

INTEGRAL = 1 to 5 mA

and 0·45 V < V

PDP < VDD

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