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LC898123AXD Folha de dados(PDF) 11 Page - ON Semiconductor |
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LC898123AXD Folha de dados(HTML) 11 Page - ON Semiconductor |
11 / 12 page LC898123AXD www.onsemi.com 11 2-wire serial Interface Timing The communication protocol is compatible with I 2C (Fast mode Plus). This circuit has clock stretch function. I 2C interface timing definition Item Symbol Pin name Min Typ Max Units SCL clock frequency Fscl I2CCK 1000 kHz START condition hold time tHD,STA I2CCK I2CDT 0.26 s SCL clock Low period tLOW I2CCK 0.5 s SCL clock High period tHIGH I2CCK 0.26 s Setup time for repetition START condition tSU,STA I2CCK I2CDT 0.26 s Data hold time tHD,DAT I2CCK I2CDT 0 (*1) 0.9 s Data setup time tSU,DAT I2CCK I2CDT 50 ns SDA, SCL rising time tr I2CCK I2CDT 120 ns SDA, SCL falling time tf I2CCK I2CDT 120 ns STOP condition setup time tSU,STO I2CCK I2CDT 0.26 s Bus free time between STOP and START tBUF I2CCK I2CDT 0.5 s (*1) Although the I 2C specification defines a condition that 300 ns of hold time is required internally, LC898123AXD is designed for a condition with typ. 100 ns of hold time. If SDA signal is unstable around falling point of SCL signal, please implement an appropriate treatment on board, such as inserting a resistor. |
Nº de peça semelhante - LC898123AXD |
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Descrição semelhante - LC898123AXD |
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