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SI53325 Folha de dados(PDF) 9 Page - Silicon Laboratories |
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SI53325 Folha de dados(HTML) 9 Page - Silicon Laboratories |
9 / 27 page Si53325 Rev. 1.0 9 2.2. Input Bias Resistors Internal bias resistors ensure a differential output low condition in the event that the clock inputs are not connected. The non-inverting input is biased with a 18.75 k pull-down to GND and a 75 k pull-up to VDD. The inverting input is biased with a 75 k pull-up to VDD. Figure 5. Input Bias Resistors RPU CLK0 or CLK1 RPU RPU = 75 k RPD = 18.75 k RPD + – VDD |
Nº de peça semelhante - SI53325 |
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Descrição semelhante - SI53325 |
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