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CDCE913PW Folha de dados(PDF) 5 Page - Texas Instruments |
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CDCE913PW Folha de dados(HTML) 5 Page - Texas Instruments |
5 / 35 page CDCE913, CDCEL913 www.ti.com SCAS849F – JUNE 2007 – REVISED APRIL 2015 6.4 Thermal Information (1) (2) over operating free-air temperature range (unless otherwise noted) CDCEx913 THERMAL METRIC(3) PW [TSSOP] UNIT 14 PINS Airflow 0 lfm 106 Airflow 150 lfm 93 RθJA Junction-to-ambient thermal resistance Airflow 200 lfm 92 Airflow 250 lfm 90 Airflow 500 lfm 85 RθJC(to °C/W Junction-to-case (top) thermal resistance 1.4 p) RθJB Junction-to-board thermal resistance 66 ψJT Junction-to-top characterization parameter 1.35 ψJB Junction-to-board characterization parameter 61.83 RθJC(b Junction-to-case (bottom) thermal resistance 62 ot) (1) The package thermal impedance is calculated in accordance with JESD 51 and JEDEC2S2P (high-K board). (2) For the most-current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. (3) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 6.5 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) TEST CONDITIONS MIN TYP(1) MAX UNIT OVERALL PARAMETER All outputs off, fCLK = 27 MHz, All PLLS on 11 IDD Supply current (see Figure 1) fVCO = 135 MHz; mA 9 Per PLL fOUT = 27 MHz VDDOUT = 3.3 V 1.3 No load, all outputs on, IDD(OUT) Supply current (see Figure 2 and Figure 3) mA fOUT = 27 MHz VDDOUT = 1.8 V 0.7 Power-down current. Every circuit powered IDD(PD) fIN = 0 MHz, VDD = 1.9 V 30 μA down except SDA/SCL Supply voltage Vdd threshold for power-up V(PUC) 0.85 1.45 V control circuit fVCO VCO frequency range of PLL 80 230 MHz VDDOUT = 3.3 V 230 fOUT LVCMOS output frequency MHz VDDOUT = 1.8 V 230 LVCMOS PARAMETER VIK LVCMOS input voltage VDD = 1.7 V; II = –18 mA –1.2 V II LVCMOS input current VI = 0 V or VDD; VDD = 1.9 V ±5 μA IIH LVCMOS input current for S0/S1/S2 VI = VDD; VDD = 1.9 V 5 μA IIL LVCMOS input current for S0/S1/S2 VI = 0 V; VDD = 1.9 V –4 μA Input capacitance at Xin/Clk VIClk = 0 V or VDD 6 CI Input capacitance at Xout VIXout = 0 V or VDD 2 pF Input capacitance at S0/S1/S2 VIS = 0 V or VDD 3 CDCE913 - LVCMOS PARAMETER FOR VDDOUT = 3.3 V – MODE VDDOUT = 3 V, IOH = –0.1 mA 2.9 VOH LVCMOS high-level output voltage VDDOUT = 3 V, IOH = –8 mA 2.4 V VDDOUT = 3 V, IOH = –12 mA 2.2 VDDOUT = 3 V, IOL = 0.1 mA 0.1 VOL LVCMOS low-level output voltage VDDOUT = 3 V, IOL = 8 mA 0.5 V VDDOUT = 3 V, IOL = 12 mA 0.8 (1) All typical values are at respective nominal VDD. Copyright © 2007–2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: CDCE913 CDCEL913 |
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