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TPD13S523 Folha de dados(PDF) 11 Page - Texas Instruments

Nome de Peças TPD13S523
Descrição Electrónicos  13-Channel ESD Protection Solution
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TPD13S523
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SLVSBC5D – MARCH 2012 – REVISED OCTOBER 2015
8.2.2.1 5V_SUPPLY Voltage Range
The TPD13S523 is capable of operating the 5V_SUPPLY up to 5.5 V, with recommended voltage from 4.5 V to
5.5 V. In this example, the supply range is 4.8 V to 5.3 V, which satisfies this requirement.
8.2.2.2 Maximum HDMI Data Rate
The TPD13S523 is capable of operating at HDMI data rates in excess of 3.4 Gbps, compliant to the HDMI 1.4
maximum data rate. In this example, the maximum HDMI 1.4 data rate of 3.4 Gbps has been chosen.
8.2.3 Application Curves
Figure 12. Eye Diagram Using EVM Without TPD13S523 for
Figure 13. Eye Diagram Using EVM With TPD13S523 for
the TMDS Lines
the TMDS Lines
at 1080p, 340-MHz Pixel Clock, 3.4 Gbps
at 1080p, 340-MHz Pixel Clock, 3.4 Gbps
9 Power Supply Recommendations
The designer must consider the requirement for the 5V_OUT voltage level. To ensure the voltage is within
tolerance under load, set 5V_SUPPLY to at least 4.8 V + VDROP (205 mV). Otherwise, TPD13S523 is a passive
ESD protection device and there is no need to power it.
10 Layout
10.1 Layout Guidelines
The TPD13S523 device offers little or no signal distortion during normal operation due to low I/O capacitance
and ultra-low leakage current specifications. In the event of an ESD stress, this device ensures that the core
circuitry is protected and the system is functioning properly. For proper operation, the following layout and design
guidelines should be followed:
1. Place the TPD13S523 as close to the connector as possible. This allows the TPD13S523 to remove the
energy associated with ESD strike before it reaches the internal circuitry of the system board.
2. Place two 0.1-
μF capacitors very close to the 5V_SUPPLY and 5V_OUT pins. These capacitors will help limit
the noise at the 5V_OUT power line, and also help with system level ESD protection.
3. Ensure that there is enough metallization for the GND pad. During normal operation, the TPD13S523 ESD
pins consume ultra-low leakage current. During the ESD event, GND pin will see multiple amps of current. A
sufficient current path enables safe discharge of all the energy associated with the ESD strike.
4. The critical routing paths for HDMI interface are the high-speed TMDS lines. With the PW package, all the
TMDS lines (pin Dxx) can be routed in a single signal plane and still maintain the differential coupling and
trace symmetry. This helps reduce the overall board manufacturing cost. The slow speed control lines can be
routed in another signal layer through vias.
5. If the UTILITY or any other pin is not utilizied, tie the pin to a ground rather than leave floating. Use a 75-
Ω
resistor to protect against shorts to ground.
Copyright © 2012–2015, Texas Instruments Incorporated
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