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ADC1005CCJ Folha de dados(PDF) 8 Page - National Semiconductor (TI) |
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ADC1005CCJ Folha de dados(HTML) 8 Page - National Semiconductor (TI) |
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8 / 12 page  Functional Description (Continued) signal makes a high-to-low transition the one shot fires, set- ting the INTR F/F. An inverting buffer then supplies the INTR output signal. Note that this SET control of the INTR F/F remains low for approximately 400 ns. If the data output is continuously en- abled (CS and RD both held low) the INTR output will still signal the end of the conversion (by a high-to-low transition). This is because the SET input can control the Q output of the INTR F/F even though the RESET input is constantly at a “1” level. This INTR output will therefore stay low for the duration of the SET signal. When data is to be read, the combination of both CS and RD being low will cause the INTR F/F to be reset and the TRI-STATE output latches will be enabled. 1.4 Free-Running and Self-Clocking Modes For operation in the free-running mode an initializing pulse should be used, following power-up, to ensure circuit opera- tion. In this application, the CS input is grounded and the WR input is tied to the INTR output. This WR and INTR node should be momentarily forced to logic low following a power-up cycle to ensure start up. The clock for the A/D can be derived from the CPU clock or an external RC can be added to provide self-clocking. The CLK IN makes use of a Schmitt trigger as shown in Figure 2. 2.0 REFERENCE VOLTAGE The voltage applied to the reference input of these convert- ers defines the voltage span of the analog input (the differ- ence between V IN(MAX) and VIN(MIN)) over which the 1024 possible output codes apply. The devices can be used in ei- ther ratiometric applications or in systems requiring absolute accuracy. The reference pin must be connected to a voltage source capable of driving the reference input resistance of typically 4.8 k Ω. This pin is the top of a resistor divider string used for the successive approximation conversion. In a ratiometric system ( Figure 3) the analog input voltage is proportional to the voltage used for the A/D reference. This voltage is typically the system power supply, so the V REF pin can be tied to V CC. This technique relaxes the stability re- quirements of the system references as the analog input and A/D reference move together maintaining the same output code for a given input condition. For absolute accuracy ( Figure 4), where the analog input varies between very specific voltage limits, the reference pin can be biased with a time and temperature stable voltage source. The LM385 and LM336 reference diodes are good low current devices to use with these converters. The maximum value of the reference is limited to the V CC supply voltage. The minimum value, however, can be small to allow direct conversions of transducer outputs providing less than a 5V output span. Particular care must be taken with regard to noise pickup, circuit layout, and system error voltage sources when operating with a reduced span due to the increased sensitivity of the converter (1 LSB equals V REF/1024). 3.0 THE ANALOG INPUTS 3.1 Analog Differential Voltage Inputs and Common-Mode Rejection The differential inputs of these converters reduce the effects of common-mode input noise, which is defined as noise common to both selected “+” and “−” inputs (60 Hz is most typical). The time interval between sampling the “+” input and the “−” input is half of an internal clock period. The DS005261-12 FIGURE 2. Self-Clocking the A/D DS005261-17 FIGURE 3. Ratiometric DS005261-18 FIGURE 4. Absolute with a Reduced Span www.national.com 8 |
Nº de peça semelhante - ADC1005CCJ |
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Descrição semelhante - ADC1005CCJ |
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