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ADC12H030 Folha de dados(PDF) 33 Page - National Semiconductor (TI) |
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ADC12H030 Folha de dados(HTML) 33 Page - National Semiconductor (TI) |
33 / 41 page Application Hints (Continued) 3.0 REFERENCE VOLTAGE The difference in the voltages applied to the V REF + and V REF − defines the analog input span (the difference between the voltage applied between two multiplexer inputs or the voltage applied to one of the multiplexer inputs and analog ground), over which 4095 positive and 4096 negative codes exist. The voltage sources driving V REF + or V REF − must have very low output impedance and noise. The circuit in Figure 16 is an example of a very stable reference appropriate for use with the device. The ADC 12030/2/4/8 can be used in either ratiometric or absolute reference applications. In ratiometric systems, the analog input voltage is proportional to the voltage used for the ADC’s reference voltage. When this voltage is the sys- tem power supply, the V REF + pin is connected to V A + and V REF − is connected to ground. This technique relaxes the system reference stability requirements because the analog input voltage and the ADC reference voltage move together. This maintains the same output code for given input condi- tions. For absolute accuracy, where the analog input voltage varies between very specific voltage limits, a time and tem- perature stable voltage source can be connected to the reference inputs. Typically, the reference voltage’s magni- tude will require an initial adjustment to null reference volt- age induced full-scale errors. Below are recommended references along with some key specifications. Output Temperature Part Number Voltage Coefficient Tolerance LM4041CI-Adj ±0.5% ±100ppm/˚C LM4040AI-4.1 ±0.1% ±100ppm/˚C LM4120AI-4.1 ±0.2% ±50ppm/˚C LM4121AI-4.1 ±0.2% ±50ppm/˚C LM4050AI-4.1 ±0.1 ±50ppm/˚C LM4030AI-4.1 ±0.05% ±10ppm/˚C LM4031AI ±2.2 ±26ppm/˚C LM4031AC ±0.4 ±46ppm/˚C LM4140AC-4.1 ±0.1% ±3.0ppm/˚C Circuit of Figure 16 Adjustable ±2ppm/˚C The reference voltage inputs are not fully differential. The ADC12030/2/4/8 will not generate correct conversions or comparisons if V REF + is taken below V REF −. Correct conver- sions result when V REF + and V REF − differ by 1V and remain, at all times, between ground and V A +. The V REF common mode range, (V REF + +V REF −)/2 is restricted to (0.1 x V A +)to (0.6 x V A +). Therefore, with V A + = 5V the center of the reference ladder should not go below 0.5V or above 3.0V. Figure 17 is a graphic representation of the voltage restric- tions on V REF + and V REF −. 01135450 FIGURE 15. Fully Differential Biasing 01135442 *Tantalum FIGURE 16. Low Drift Extremely Stable Reference Circuit www.national.com 33 |
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