7

SL1935

Table 9a. Write data format (MSB is transmitted first)

Table 9b. Read data format (MSB is transmitted first)

Table 9c. Address selection

Key to Tables 9a to 9c

A ......................................... Acknowledge bit

MA1, MA0 ........................... Variable address bits (Table 9c)

C1 to C0 .............................. Charge pump current select (Table 5)

R4 to R0 .............................. Reference division ratio select (Table 3)

T2 to T0 .............................. Test modes control bits (Table 4)

BS ....................................... Baseband path select (Table 6)

VS ....................................... Local oscillator select (Table 8)

RE ....................................... Buffered crystal reference output enable (Table 7)

P0 ....................................... P0 port output state

POR .................................... Power on reset indicator

FL ........................................ Phase lock flag

Note: * Programmed by connecting a 30kΩ resistor between pin and Vcc

0.5

0.2

1

0

+j0.2

+j0.5

+j1

+j2

+j5

—j5

—j2

—j1

—j0.5

—j0.2

STOP 2150MHz

START 950MHz

X

X

X

X

X

1

2

3

4

Normalised to 75

Ω

Marker

1

2

3

4

Freq (MHz)

950

1400

1600

2150

Z real

Ω

64

40

32

23

Z imag

Ω

-100

-75

-65

-45

Figure 3. RF input impedance (typical)

Address

Programmable

divider

Programmable

divider

Control data

Control data

MSB

1

0

1

T2

1

C1

T1

0

C0

T0

LSB

0

R0

P0

0

R4

VS

0

R3

BS

MA1

R2

0

MA0

R1

RE

A

A

A

A

A

Byte 1

Byte 2

Byte 3

Byte 4

Byte 5

Address

Status Byte

MSB

1

POR

1

FL

0

0

LSB

1

0

0

0

0

0

MA1

0

MA0

0

A

A

Byte 1

Byte 2

MA1

0

0

1

1

MA0

0

1

0

1

Address input voltage level

0 - 0.1 Vcc

Open circuit

0.4 Vcc - 0.6 Vcc*

0.9 Vcc - Vcc

5

2