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DAC0800LCJ Folha de dados(PDF) 6 Page - National Semiconductor (TI) |
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DAC0800LCJ Folha de dados(HTML) 6 Page - National Semiconductor (TI) |
6 / 11 page Typical Applications DS005686-5 IO +IO = IFS for all logic states For fixed reference, TTL operation, typical values are: VREF = 10.000V RREF = 5.000k R15 ≈ RREF CC = 0.01 µF VLC = 0V (Ground) FIGURE 3. Basic Positive Reference Operation (Note 5) DS005686-21 FIGURE 4. Recommended Full Scale Adjustment Circuit (Note 5) DS005686-16 Note. RREF sets IFS; R15 is for bias current cancellation FIGURE 5. Basic Negative Reference Operation (Note 5) DS005686-17 B1 B2 B3 B4 B5 B6 B7 B8 I O mA I OmA E O E O Full Scale 11111111 1.992 0.000 −9.960 0.000 Full Scale−LSB 11111110 1.984 0.008 −9.920 −0.040 Half Scale+LSB 10000001 1.008 0.984 −5.040 −4.920 Half Scale 10000000 1.000 0.992 −5.000 −4.960 Half Scale−LSB 01111111 0.992 1.000 −4.960 −5.000 Zero Scale+LSB 00000001 0.008 1.984 −0.040 −9.920 Zero Scale 00000000 0.000 1.992 0.000 −9.960 FIGURE 6. Basic Unipolar Negative Operation (Note 5) www.national.com 6 |
Nº de peça semelhante - DAC0800LCJ |
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Descrição semelhante - DAC0800LCJ |
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