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DM54LS240W Folha de dados(PDF) 1 Page - National Semiconductor (TI) |
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DM54LS240W Folha de dados(HTML) 1 Page - National Semiconductor (TI) |
1 / 6 page TLF6411 April 1992 DM54LS240DM74LS240 DM54LS241DM74LS241 Octal TRI-STATE BuffersLine DriversLine Receivers General Description These buffersline drivers are designed to improve both the performance and PC board density of TRI-STATE buffers drivers employed as memory-address drivers clock drivers and bus-oriented transmittersreceivers Featuring 400 mV of hysteresis at each low current PNP data line input they provide improved noise rejection and high fanout outputs and can be used to drive terminated lines down to 133X Features Y TRI-STATE outputs drive bus lines directly Y PNP inputs reduce DC loading on bus lines Y Hysteresis at data inputs improves noise margins Y Typical IOL (sink current) 54LS 12 mA 74LS 24 mA Y Typical IOH (source current) 54LS b 12 mA 74LS b 15 mA Y Typical propagation delay times Inverting 105 ns Noninverting 12 ns Y Typical enabledisable time 18 ns Y Typical power dissipation (enabled) Inverting 130 mW Noninverting 135 mW Connection Diagrams Dual-In-Line Package TLF6411 – 1 Dual-In-Line Package TLF6411 – 2 Order Number DM54LS240J DM54LS240W DM54LS240E DM74LS240WM or DM74LS240N See NS Package Number E20A J20A M20B N20A or W20A Order Number DM54LS241J DM54LS241W DM54LS241E DM74LS241WM or DM74LS241N See NS Package Number E20A J20A M20B N20A or W20A Function Tables LS240 Inputs Output G AY LL H LH L HX Z LS241 Inputs Outputs GG 1A 2A 1Y 2Y XL L X L XL H X H XH X X Z HX X L L HX X H H LX X X Z L e Low Logic Level H e High Logic Level X e Either Low or High Logic Level Z e High Impedance TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation RRD-B30M105Printed in U S A |
Nº de peça semelhante - DM54LS240W |
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Descrição semelhante - DM54LS240W |
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