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AM1808EZWT4 Folha de dados(PDF) 10 Page - Texas Instruments

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Nome de Peças AM1808EZWT4
Descrição Electrónicos  AM1808 ARM짰 Microprocessor
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AM1808
SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
www.ti.com
3.3.6
Embedded Trace Macrocell (ETM) and Embedded Trace Buffer (ETB)
To support real-time trace, the ARM926EJ-S processor provides an interface to enable connection of an
Embedded Trace Macrocell (ETM). The ARM926ES-J Subsystem in the device also includes the
Embedded Trace Buffer (ETB). The ETM consists of two parts:
Trace Port provides real-time trace capability for the ARM9.
Triggering facilities provide trigger resources, which include address and data comparators, counter,
and sequencers.
The device trace port is not pinned out and is instead only connected to the Embedded Trace Buffer. The
ETB has a 4KB buffer memory. ETB enabled debug tools are required to read/interpret the captured trace
data.
3.3.7
ARM Memory Mapping
By default the ARM has access to most on and off chip memory areas, including EMIFA, DDR2, and the
additional 128K byte on chip SRAM. Likewise almost all of the on chip peripherals are accessible to the
ARM by default.
To improve security and/or robustness, the device has extensive memory and peripheral protection units
which can be configured to limit access rights to the various on/off chip resources to specific hosts;
including the ARM as well as other master peripherals. This allows the system tasks to be partitioned
between the ARM and DSP as best suites the particular application; while enhancing the overall
robustness of the solution.
See Table 3-2 for a detailed top level device memory map that includes the ARM memory space.
10
Device Overview
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