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CDC319DBG4 Folha de dados(PDF) 3 Page - Texas Instruments |
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CDC319DBG4 Folha de dados(HTML) 3 Page - Texas Instruments |
3 / 15 page CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590A – DECEMBER 1997 – REVISED OCTOBER 2001 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 I2C DEVICE ADDRESS A7 A6 A5 A4 A3 A2 A1 A0 (R/W) H H L H L L H — I2C BYTE 0-BIT DEFINITION† BIT DEFINITION DEFAULT VALUE 7 Reserved H 6 Reserved H 5 Reserved H 4 Reserved H 3 1Y3 enable (pin 7) H 2 1Y2 enable (pin 6) H 1 1Y1 enable (pin 3) H 0 1Y0 enable (pin 2) H † When the value of the bit is high, the output is enabled. When the value of the bit is low, the output is forced to a low state. The default value of all bits is high. I2C BYTE 1-BIT DEFINITION† BIT DEFINITION DEFAULT VALUE 7 2Y3 enable (pin 27) H 6 2Y2 enable (pin 26) H 5 2Y1 enable (pin 23) H 4 2Y0 enable (pin 22) H 3 Reserved H 2 Reserved H 1 Reserved H 0 Reserved H † When the value of the bit is high, the output is enabled. When the value of the bit is low, the output is forced to a low state. The default value of all bits is high. I2C BYTE 2-BIT DEFINITION† BIT DEFINITION DEFAULT VALUE 7 3Y1 enable (pin 18) H 6 3Y0 enable (pin 11) H 5 Reserved H 4 Reserved H 3 Reserved H 2 Reserved H 1 Reserved H 0 Reserved H † When the value of the bit is high, the output is enabled. When the value of the bit is low, the output is forced to a low state. The default value of all bits is high. |
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Descrição semelhante - CDC319DBG4 |
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