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AD8065AR Folha de dados(PDF) 7 Page - Analog Devices |
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AD8065AR Folha de dados(HTML) 7 Page - Analog Devices |
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7 / 28 page  AD8065/AD8066 Rev. E | Page 7 of 28 MAXIMUM POWER DISSIPATION The maximum safe power dissipation in the AD8065/AD8066 packages is limited by the associated rise in junction temperature (TJ) on the die. The plastic encapsulating the die will locally reach the junction temperature. At approximately 150°C, which is the glass transition temperature, the plastic will change its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the AD8065/AD8066. Exceeding a junction temperature of 175°C for an extended period of time can result in changes in the silicon devices, potentially causing failure. The still-air thermal properties of the package and PCB (θJA), ambient temperature (TA), and total power dissipated in the package (PD) determine the junction temperature of the die. The junction temperature can be calculated as ( ) JA D A J P T T θ × + = The power dissipated in the package ( PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive for all outputs. The quiescent power is the voltage between the supply pins ( VS) times the quiescent current ( IS). Assuming the load (RL) is referenced to midsupply, then the total drive power is VS /2 × IOUT, some of which is dissipated in the package and some in the load ( VOUT × IOUT). The difference between the total drive power and the load power is the drive power dissipated in the package. ( ) Power Load Power Drive Total Power Quiescent PD − + = () L OUT L OUT S S S D R V R V V I V P 2 2 − ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ × + × = RMS output voltages should be considered. If RL is referenced to VS−, as in single-supply operation, then the total drive power is VS × IOUT. If the rms signal levels are indeterminate, then consider the worst case, when VOUT = VS/4 for RL to midsupply. () () L S S S D R V I V P 2 4 / + × = In single-supply operation with RL referenced to VS−, worst case is VOUT = VS/2. 0 0.5 1.0 1.5 2.0 20 0 –40 –20 –60 40 60 80 100 AMBIENT TEMPERATURE (°C) MSOP-8 SOIC-8 SOT-23-5 Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board Airflow will increase heat dissipation, effectively reducing θJA. Also, more metal directly in contact with the package leads from metal traces, through holes, ground, and power planes will reduce the θJA. Care must be taken to minimize parasitic capacitances at the input leads of high speed op amps as discussed in the Layout, Grounding, and Bypassing Considerations section. Figure 3 shows the maximum safe power dissipation in the package versus the ambient temperature for the SOIC (125°C/W), SOT-23 (180°C/W), and MSOP (150°C/W) packages on a JEDEC standard 4-layer board. θJA values are approximations. OUTPUT SHORT CIRCUIT Shorting the output to ground or drawing excessive current for the AD8065/AD8066 will likely cause catastrophic failure. |
Nº de peça semelhante - AD8065AR |
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Descrição semelhante - AD8065AR |
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