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74FCT163H245APVCT Folha de dados(PDF) 1 Page - Texas Instruments |
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74FCT163H245APVCT Folha de dados(HTML) 1 Page - Texas Instruments |
1 / 10 page 16-Bit Transceivers CY74FCT163245 CY74FCT163H245 SCCS051 - February 1997 - Revised March 2000 Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. Copyright © 2000, Texas Instruments Incorporated Features • Low power, pin-compatible replacement for LCX and LPT families • 5V tolerant inputs and outputs • 24 mA balanced drive outputs • Power-off disable outputs permits live insertion • Edge-rate control circuitry for reduced noise • FCT-C speed at 4.1 ns • Latch-up performance exceeds JEDEC standard no. 17 • Typical output skew < 250ps • Industrial temperature range of –40˚C to +85˚C • TSSOP (19.6-mil pitch) or SSOP (25-mil pitch) • Typical Volp (ground bounce) performance exceeds Mil Std 883D •VCC = 2.7V to 3.6V • ESD (HBM) > 2000V CY74FCT163H245 • Bus hold on data inputs • Eliminates the need for external pull-up or pull-down resistors • Devices with bus hold are not recommended for trans- lating rail-to-rail CMOS signals to 3.3V logic levels Functional Description These 16-bit transceivers are designed for use in bidirectional synchronous communication between two buses, where high speed and low power are required. Direction of data flow is controlled by (DIR), the Output Enable (OE) transfers data when LOW and isolates the buses when HIGH. The outputs are 24-mA balanced output drivers with current limiting resistors to reduce the need for external terminating resistors and provide for minimal undershoot and reduced ground bounce.. The CY74FCT163H245 has “bus hold” on the data inputs, which retains the input’s last state whenever the input goes to high impedance. This eliminates the need for pull-up/down resistors and prevents floating inputs. The CY74FCT163245 is designed with inputs and outputs capable of being driven by 5.0V buses, allowing its use in mixed voltage systems as a translator. The outputs are also designed with a power off disable feature enabling its use in applications requiring live insertion. GND Logic Block Diagrams CY74FCT163245, CY74FCT163H245 Pin Configuration 1 2 3 4 5 6 7 8 9 10 11 12 33 32 31 30 29 25 26 27 28 36 35 1DIR 34 SSOP/TSSOP Top View 13 14 15 16 17 18 19 20 21 22 23 24 45 44 43 42 41 37 38 39 40 48 47 46 1B1 1B2 1B3 1B4 1A1 1A2 1A3 1A4 1OE GND GND VCC 1B7 1B8 1B5 1B6 1A5 1A6 1A7 1A8 VCC GND GND 2B3 2B4 2B1 2B2 2A1 2A2 2A3 2A4 GND GND VCC 2B7 2B8 2B5 2B6 2A5 2A6 2A7 2A8 VCC GND 2DIR 2OE 1A1 1A2 1A3 1A4 1A5 1A6 1A7 1OE 1B1 1B2 1B3 1B4 1B5 1B6 1B7 1DIR 1A8 1B8 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2OE 2B1 2B2 2B3 2B4 2B5 2B6 2B7 2DIR 2A8 2B8 163245 163H245 |
Nº de peça semelhante - 74FCT163H245APVCT |
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Descrição semelhante - 74FCT163H245APVCT |
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